diff -uNpr linux-2.6.14.6/Makefile linux-2.6.14.6-20060127/Makefile --- linux-2.6.14.6/Makefile 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/Makefile 2006-01-27 19:00:31.299597200 +0900 @@ -1,7 +1,7 @@ VERSION = 2 PATCHLEVEL = 6 SUBLEVEL = 14 -EXTRAVERSION = .6 +EXTRAVERSION = .6-20060127 NAME=Affluent Albatross # *DOCUMENTATION* diff -uNpr linux-2.6.14.6/arch/m32r/Kconfig linux-2.6.14.6-20060127/arch/m32r/Kconfig --- linux-2.6.14.6/arch/m32r/Kconfig 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/Kconfig 2006-01-27 19:00:31.351588987 +0900 @@ -81,6 +81,12 @@ config PLAT_MAPPI2 config PLAT_MAPPI3 bool "Mappi-III(M3A-2170)" +config PLAT_M32104UT + bool "M32104UT" + help + The M3T-M32104UT is an reference board based on uT-Engine + specification. This board has a M32104 chip. + endchoice choice @@ -93,6 +99,10 @@ config CHIP_M32700 config CHIP_M32102 bool "M32102" +config CHIP_M32104 + bool "M32104" + depends on PLAT_M32104UT + config CHIP_VDEC2 bool "VDEC2" @@ -115,7 +125,7 @@ config TLB_ENTRIES config ISA_M32R bool - depends on CHIP_M32102 + depends on CHIP_M32102 || CHIP_M32104 default y config ISA_M32R2 @@ -140,6 +150,7 @@ config BUS_CLOCK default "50000000" if PLAT_MAPPI3 default "50000000" if PLAT_M32700UT default "50000000" if PLAT_OPSPUT + default "54000000" if PLAT_M32104UT default "33333333" if PLAT_OAKS32R default "20000000" if PLAT_MAPPI2 @@ -157,6 +168,7 @@ config MEMORY_START default "08000000" if PLAT_USRV default "08000000" if PLAT_M32700UT default "08000000" if PLAT_OPSPUT + default "04000000" if PLAT_M32104UT default "01000000" if PLAT_OAKS32R config MEMORY_SIZE @@ -166,6 +178,7 @@ config MEMORY_SIZE default "02000000" if PLAT_USRV default "01000000" if PLAT_M32700UT default "01000000" if PLAT_OPSPUT + default "01000000" if PLAT_M32104UT default "00800000" if PLAT_OAKS32R config NOHIGHMEM @@ -174,21 +187,22 @@ config NOHIGHMEM config ARCH_DISCONTIGMEM_ENABLE bool "Internal RAM Support" - depends on CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP + depends on CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP || CHIP_M32104 default y source "mm/Kconfig" config IRAM_START hex "Internal memory start address (hex)" - default "00f00000" - depends on (CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP) && DISCONTIGMEM + default "00f00000" if !CHIP_M32104 + default "00700000" if CHIP_M32104 + depends on (CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP || CHIP_M32104) && DISCONTIGMEM config IRAM_SIZE hex "Internal memory size (hex)" - depends on (CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP) && DISCONTIGMEM + depends on (CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP || CHIP_M32104) && DISCONTIGMEM default "00080000" if CHIP_M32700 - default "00010000" if CHIP_M32102 || CHIP_OPSP + default "00010000" if CHIP_M32102 || CHIP_OPSP || CHIP_M32104 default "00008000" if CHIP_VDEC2 # @@ -267,6 +281,8 @@ config NUMA depends on SMP && BROKEN default n +source "drivers/m32r/Kconfig" + # turning this on wastes a bunch of space. # Summit needs it only when NUMA is on config BOOT_IOREMAP diff -uNpr linux-2.6.14.6/arch/m32r/Makefile linux-2.6.14.6-20060127/arch/m32r/Makefile --- linux-2.6.14.6/arch/m32r/Makefile 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/Makefile 2006-01-27 19:00:31.376585039 +0900 @@ -12,14 +12,14 @@ CFLAGS_MODULE += -mmodel=large ifdef CONFIG_CHIP_VDEC2 cflags-$(CONFIG_ISA_M32R2) += -DNO_FPU -Wa,-bitinst -aflags-$(CONFIG_ISA_M32R2) += -DNO_FPU -Wa,-bitinst +aflags-$(CONFIG_ISA_M32R2) += -DNO_FPU -O2 -Wa,-bitinst -Wa,-no-parallel else cflags-$(CONFIG_ISA_M32R2) += -DNO_FPU -m32r2 -aflags-$(CONFIG_ISA_M32R2) += -DNO_FPU -m32r2 +aflags-$(CONFIG_ISA_M32R2) += -DNO_FPU -m32r2 -O2 endif cflags-$(CONFIG_ISA_M32R) += -DNO_FPU -aflags-$(CONFIG_ISA_M32R) += -DNO_FPU -Wa,-no-bitinst +aflags-$(CONFIG_ISA_M32R) += -DNO_FPU -Wa,-no-bitinst -O2 CFLAGS += $(cflags-y) AFLAGS += $(aflags-y) @@ -35,6 +35,7 @@ core-y += arch/m32r/kernel/ \ arch/m32r/mm/ \ arch/m32r/boot/ +drivers-y += drivers/m32r/ drivers-$(CONFIG_OPROFILE) += arch/m32r/oprofile/ boot := arch/m32r/boot diff -uNpr linux-2.6.14.6/arch/m32r/boot/compressed/head.S linux-2.6.14.6-20060127/arch/m32r/boot/compressed/head.S --- linux-2.6.14.6/arch/m32r/boot/compressed/head.S 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/boot/compressed/head.S 2006-01-27 19:00:31.402580933 +0900 @@ -143,6 +143,11 @@ startup: ldi r0, -2 ldi r1, 0x0100 ; invalidate stb r1, @r0 +#elif defined(CONFIG_CHIP_M32104) + /* Cache flush */ + ldi r0, -2 + ldi r1, 0x0700 ; invalidate i-cache, copy back d-cache + sth r1, @r0 #else #error "put your cache flush function, please" #endif diff -uNpr linux-2.6.14.6/arch/m32r/boot/setup.S linux-2.6.14.6-20060127/arch/m32r/boot/setup.S --- linux-2.6.14.6/arch/m32r/boot/setup.S 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/boot/setup.S 2006-01-27 19:00:31.435575721 +0900 @@ -80,6 +80,10 @@ ENTRY(boot) ldi r1, #0x101 ; cache on (with invalidation) ; ldi r1, #0x00 ; cache off st r1, @r0 +#elif defined(CONFIG_CHIP_M32104) + ldi r0, #-4 ;LDIMM (r0, M32R_MCCR) + ldi r1, #0x703 ; cache on (with invalidation) + st r1, @r0 #else #error unknown chip configuration #endif @@ -115,10 +119,15 @@ mmu_on: st r1, @(MATM_offset,r0) ; Set MATM (T bit ON) ld r0, @(MATM_offset,r0) ; Check #else +#if defined(CONFIG_CHIP_M32700) seth r0,#high(M32R_MCDCAR) or3 r0,r0,#low(M32R_MCDCAR) ld24 r1,#0x8080 st r1,@r0 +#elif defined(CONFIG_CHIP_M32104) + LDIMM (r2, eit_vector) ; set EVB(cr5) + mvtc r2, cr5 +#endif #endif /* CONFIG_MMU */ jmp r13 nop diff -uNpr linux-2.6.14.6/arch/m32r/kernel/Makefile linux-2.6.14.6-20060127/arch/m32r/kernel/Makefile --- linux-2.6.14.6/arch/m32r/kernel/Makefile 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/Makefile 2006-01-27 19:00:31.475569404 +0900 @@ -16,5 +16,6 @@ obj-$(CONFIG_PLAT_M32700UT) += setup_m32 obj-$(CONFIG_PLAT_OPSPUT) += setup_opsput.o io_opsput.o obj-$(CONFIG_MODULES) += module.o obj-$(CONFIG_PLAT_OAKS32R) += setup_oaks32r.o io_oaks32r.o +obj-$(CONFIG_PLAT_M32104UT) += setup_m32104ut.o io_m32104ut.o EXTRA_AFLAGS := -traditional diff -uNpr linux-2.6.14.6/arch/m32r/kernel/entry.S linux-2.6.14.6-20060127/arch/m32r/kernel/entry.S --- linux-2.6.14.6/arch/m32r/kernel/entry.S 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/entry.S 2006-01-27 19:29:49.908898485 +0900 @@ -102,6 +102,12 @@ #define ACC0L(reg) @(0x40,reg) #define ACC1H(reg) @(0x44,reg) #define ACC1L(reg) @(0x48,reg) +#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) +#define ACCH(reg) @(0x3C,reg) +#define ACCL(reg) @(0x40,reg) +#else +#error unknown isa configuration +#endif #define PSW(reg) @(0x4C,reg) #define BPC(reg) @(0x50,reg) #define BBPSW(reg) @(0x54,reg) @@ -111,21 +117,6 @@ #define LR(reg) @(0x64,reg) #define SP(reg) @(0x68,reg) #define ORIG_R0(reg) @(0x6C,reg) -#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) -#define ACCH(reg) @(0x3C,reg) -#define ACCL(reg) @(0x40,reg) -#define PSW(reg) @(0x44,reg) -#define BPC(reg) @(0x48,reg) -#define BBPSW(reg) @(0x4C,reg) -#define BBPC(reg) @(0x50,reg) -#define SPU(reg) @(0x54,reg) -#define FP(reg) @(0x58,reg) /* FP = R13 */ -#define LR(reg) @(0x5C,reg) -#define SP(reg) @(0x60,reg) -#define ORIG_R0(reg) @(0x64,reg) -#else -#error unknown isa configuration -#endif CF_MASK = 0x00000001 TF_MASK = 0x00000100 @@ -315,11 +306,22 @@ ENTRY(ei_handler) mv r1, sp ; arg1(regs) #if defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \ || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \ - || defined(CONFIG_CHIP_OPSP) + || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) ; GET_ICU_STATUS; seth r0, #shigh(M32R_ICU_ISTS_ADDR) ld r0, @(low(M32R_ICU_ISTS_ADDR),r0) +#if !defined(CONFIG_SMP) +#if 1 + mv r2, r0 + slli r2, #4 + srli r2, #24 ; r0(irq_num<<2) + bnez r2, 1f + ; unexpected IPQ 0 + bra ret_to_intr +1: +#endif +#endif /* WORKAROUND */ st r0, @-sp #if defined(CONFIG_SMP) /* @@ -398,6 +400,12 @@ check_int0: lduh r0, @r0 slli r0, #21 srli r0, #27 ; ISN +#if 1 + bnez r0, 10f + ldi r0, #1 + .fillinsn +10: +#endif add3 r0, r0, #(M32700UT_LAN_PLD_IRQ_BASE) bra check_end .fillinsn @@ -541,7 +549,20 @@ check_int2: bra check_end .fillinsn check_end: -#endif /* CONFIG_PLAT_OPSPUT */ +#elif defined(CONFIG_PLAT_M32104UT) + add3 r2, r0, #-(M32R_IRQ_INT1) ; INT1# interrupt + bnez r2, check_end + ; read ICU status register of PLD + seth r0, #high(PLD_ICUISTS) + or3 r0, r0, #low(PLD_ICUISTS) + lduh r0, @r0 + slli r0, #21 + srli r0, #27 ; ISN + addi r0, #(M32104UT_PLD_IRQ_BASE) + bra check_end + .fillinsn +check_end: +#endif /* CONFIG_PLAT_M32104UT */ bl do_IRQ #endif /* CONFIG_SMP */ ld r14, @sp+ diff -uNpr linux-2.6.14.6/arch/m32r/kernel/io_m32104ut.c linux-2.6.14.6-20060127/arch/m32r/kernel/io_m32104ut.c --- linux-2.6.14.6/arch/m32r/kernel/io_m32104ut.c 1970-01-01 09:00:00.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/io_m32104ut.c 2006-01-27 19:00:31.535559928 +0900 @@ -0,0 +1,297 @@ +/* + * linux/arch/m32r/kernel/io_m32104ut.c + * + * Typical I/O routines for M32104UT board. + * + * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata, + * Hitoshi Yamamoto, Mamoru Sakugawa + */ + +#include +#include +#include +#include +#include + +#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) +#include + +#define M32R_PCC_IOMAP_SIZE 0x1000 + +#define M32R_PCC_IOSTART0 0x1000 +#define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1) + +extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int); +extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int); +extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int); +extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int); +#endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */ + +#define PORT2ADDR(port) _port2addr(port) + +static inline void *_port2addr(unsigned long port) +{ + return (void *)(port | NONCACHE_OFFSET); +} + +#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) +static inline void *__port2addr_ata(unsigned long port) +{ + static int dummy_reg; + + switch (port) { + case 0x1f0: return (void *)0xac002000; + case 0x1f1: return (void *)0xac012800; + case 0x1f2: return (void *)0xac012002; + case 0x1f3: return (void *)0xac012802; + case 0x1f4: return (void *)0xac012004; + case 0x1f5: return (void *)0xac012804; + case 0x1f6: return (void *)0xac012006; + case 0x1f7: return (void *)0xac012806; + case 0x3f6: return (void *)0xac01200e; + default: return (void *)&dummy_reg; + } +} +#endif + +/* + * M32104T-LAN is located in the extended bus space + * from 0x01000000 to 0x01ffffff on physical address. + * The base address of LAN controller(LAN91C111) is 0x300. + */ +#define LAN_IOSTART (NONCACHE_OFFSET | 0x300) +#define LAN_IOEND (NONCACHE_OFFSET | 0x320) +static inline void *_port2addr_ne(unsigned long port) +{ + return (void *)(port + 0x01000000); +} + +static inline void delay(void) +{ + __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory"); +} + +/* + * NIC I/O function + */ + +#define PORT2ADDR_NE(port) _port2addr_ne(port) + +static inline unsigned char _ne_inb(void *portp) +{ + return *(volatile unsigned char *)portp; +} + +static inline unsigned short _ne_inw(void *portp) +{ + return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp); +} + +static inline void _ne_insb(void *portp, void *addr, unsigned long count) +{ + unsigned char *buf = (unsigned char *)addr; + + while (count--) + *buf++ = _ne_inb(portp); +} + +static inline void _ne_outb(unsigned char b, void *portp) +{ + *(volatile unsigned char *)portp = b; +} + +static inline void _ne_outw(unsigned short w, void *portp) +{ + *(volatile unsigned short *)portp = cpu_to_le16(w); +} + +unsigned char _inb(unsigned long port) +{ + if (port >= LAN_IOSTART && port < LAN_IOEND) + return _ne_inb(PORT2ADDR_NE(port)); + + return *(volatile unsigned char *)PORT2ADDR(port); +} + +unsigned short _inw(unsigned long port) +{ + if (port >= LAN_IOSTART && port < LAN_IOEND) + return _ne_inw(PORT2ADDR_NE(port)); + + return *(volatile unsigned short *)PORT2ADDR(port); +} + +unsigned long _inl(unsigned long port) +{ + return *(volatile unsigned long *)PORT2ADDR(port); +} + +unsigned char _inb_p(unsigned long port) +{ + unsigned char v = _inb(port); + delay(); + return (v); +} + +unsigned short _inw_p(unsigned long port) +{ + unsigned short v = _inw(port); + delay(); + return (v); +} + +unsigned long _inl_p(unsigned long port) +{ + unsigned long v = _inl(port); + delay(); + return (v); +} + +void _outb(unsigned char b, unsigned long port) +{ + if (port >= LAN_IOSTART && port < LAN_IOEND) + _ne_outb(b, PORT2ADDR_NE(port)); + else + *(volatile unsigned char *)PORT2ADDR(port) = b; +} + +void _outw(unsigned short w, unsigned long port) +{ + if (port >= LAN_IOSTART && port < LAN_IOEND) + _ne_outw(w, PORT2ADDR_NE(port)); + else + *(volatile unsigned short *)PORT2ADDR(port) = w; +} + +void _outl(unsigned long l, unsigned long port) +{ + *(volatile unsigned long *)PORT2ADDR(port) = l; +} + +void _outb_p(unsigned char b, unsigned long port) +{ + _outb(b, port); + delay(); +} + +void _outw_p(unsigned short w, unsigned long port) +{ + _outw(w, port); + delay(); +} + +void _outl_p(unsigned long l, unsigned long port) +{ + _outl(l, port); + delay(); +} + +void _insb(unsigned int port, void *addr, unsigned long count) +{ + if (port >= LAN_IOSTART && port < LAN_IOEND) + _ne_insb(PORT2ADDR_NE(port), addr, count); + else { + unsigned char *buf = addr; + unsigned char *portp = PORT2ADDR(port); + while (count--) + *buf++ = *(volatile unsigned char *)portp; + } +} + +void _insw(unsigned int port, void *addr, unsigned long count) +{ + unsigned short *buf = addr; + unsigned short *portp; + + if (port >= LAN_IOSTART && port < LAN_IOEND) { + /* + * This portion is only used by smc91111.c to read data + * from the DATA_REG. Do not swap the data. + */ + portp = PORT2ADDR_NE(port); + while (count--) + *buf++ = *(volatile unsigned short *)portp; +#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) + } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { + pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short), + count, 1); +#endif +#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) + } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { + portp = __port2addr_ata(port); + while (count--) + *buf++ = *(volatile unsigned short *)portp; +#endif + } else { + portp = PORT2ADDR(port); + while (count--) + *buf++ = *(volatile unsigned short *)portp; + } +} + +void _insl(unsigned int port, void *addr, unsigned long count) +{ + unsigned long *buf = addr; + unsigned long *portp; + + portp = PORT2ADDR(port); + while (count--) + *buf++ = *(volatile unsigned long *)portp; +} + +void _outsb(unsigned int port, const void *addr, unsigned long count) +{ + const unsigned char *buf = addr; + unsigned char *portp; + + if (port >= LAN_IOSTART && port < LAN_IOEND) { + portp = PORT2ADDR_NE(port); + while (count--) + _ne_outb(*buf++, portp); + } else { + portp = PORT2ADDR(port); + while (count--) + *(volatile unsigned char *)portp = *buf++; + } +} + +void _outsw(unsigned int port, const void *addr, unsigned long count) +{ + const unsigned short *buf = addr; + unsigned short *portp; + + if (port >= LAN_IOSTART && port < LAN_IOEND) { + /* + * This portion is only used by smc91111.c to write data + * into the DATA_REG. Do not swap the data. + */ + portp = PORT2ADDR_NE(port); + while (count--) + *(volatile unsigned short *)portp = *buf++; +#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) + } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) { + portp = __port2addr_ata(port); + while (count--) + *(volatile unsigned short *)portp = *buf++; +#endif +#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC) + } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) { + pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short), + count, 1); +#endif + } else { + portp = PORT2ADDR(port); + while (count--) + *(volatile unsigned short *)portp = *buf++; + } +} + +void _outsl(unsigned int port, const void *addr, unsigned long count) +{ + const unsigned long *buf = addr; + unsigned char *portp; + + portp = PORT2ADDR(port); + while (count--) + *(volatile unsigned long *)portp = *buf++; +} diff -uNpr linux-2.6.14.6/arch/m32r/kernel/io_m32700ut.c linux-2.6.14.6-20060127/arch/m32r/kernel/io_m32700ut.c --- linux-2.6.14.6/arch/m32r/kernel/io_m32700ut.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/io_m32700ut.c 2006-01-27 19:00:31.586551873 +0900 @@ -36,7 +36,7 @@ extern void pcc_iowrite_word(int, unsign static inline void *_port2addr(unsigned long port) { - return (void *)(port + NONCACHE_OFFSET); + return (void *)(port | NONCACHE_OFFSET); } #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) @@ -64,11 +64,11 @@ static inline void *__port2addr_ata(unsi * from 0x10000000 to 0x13ffffff on physical address. * The base address of LAN controller(LAN91C111) is 0x300. */ -#define LAN_IOSTART 0x300 -#define LAN_IOEND 0x320 +#define LAN_IOSTART (NONCACHE_OFFSET | 0x300) +#define LAN_IOEND (NONCACHE_OFFSET | 0x320) static inline void *_port2addr_ne(unsigned long port) { - return (void *)(port + NONCACHE_OFFSET + 0x10000000); + return (void *)(port + 0x10000000); } static inline void *_port2addr_usb(unsigned long port) { diff -uNpr linux-2.6.14.6/arch/m32r/kernel/io_mappi.c linux-2.6.14.6-20060127/arch/m32r/kernel/io_mappi.c --- linux-2.6.14.6/arch/m32r/kernel/io_mappi.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/io_mappi.c 2006-01-27 19:00:31.597550136 +0900 @@ -31,7 +31,7 @@ extern void pcc_iowrite(int, unsigned lo static inline void *_port2addr(unsigned long port) { - return (void *)(port + NONCACHE_OFFSET); + return (void *)(port | (NONCACHE_OFFSET)); } static inline void *_port2addr_ne(unsigned long port) diff -uNpr linux-2.6.14.6/arch/m32r/kernel/io_mappi2.c linux-2.6.14.6-20060127/arch/m32r/kernel/io_mappi2.c --- linux-2.6.14.6/arch/m32r/kernel/io_mappi2.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/io_mappi2.c 2006-01-27 19:00:31.625545714 +0900 @@ -33,12 +33,9 @@ extern void pcc_iowrite_word(int, unsign static inline void *_port2addr(unsigned long port) { - return (void *)(port + NONCACHE_OFFSET); + return (void *)(port | (NONCACHE_OFFSET)); } -#define LAN_IOSTART 0x300 -#define LAN_IOEND 0x320 - #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) static inline void *__port2addr_ata(unsigned long port) { @@ -59,15 +56,17 @@ static inline void *__port2addr_ata(unsi } #endif +#define LAN_IOSTART (NONCACHE_OFFSET | 0x300) +#define LAN_IOEND (NONCACHE_OFFSET | 0x320) #ifdef CONFIG_CHIP_OPSP static inline void *_port2addr_ne(unsigned long port) { - return (void *)(port + NONCACHE_OFFSET + 0x10000000); + return (void *)(port + 0x10000000); } #else static inline void *_port2addr_ne(unsigned long port) { - return (void *)(port + NONCACHE_OFFSET + 0x04000000); + return (void *)(port + 0x04000000); } #endif static inline void *_port2addr_usb(unsigned long port) diff -uNpr linux-2.6.14.6/arch/m32r/kernel/io_mappi3.c linux-2.6.14.6-20060127/arch/m32r/kernel/io_mappi3.c --- linux-2.6.14.6/arch/m32r/kernel/io_mappi3.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/io_mappi3.c 2006-01-27 19:00:31.653541292 +0900 @@ -33,12 +33,9 @@ extern void pcc_iowrite_word(int, unsign static inline void *_port2addr(unsigned long port) { - return (void *)(port + NONCACHE_OFFSET); + return (void *)(port | NONCACHE_OFFSET); } -#define LAN_IOSTART 0x300 -#define LAN_IOEND 0x320 - #if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC) static inline void *__port2addr_ata(unsigned long port) { @@ -59,9 +56,11 @@ static inline void *__port2addr_ata(unsi } #endif +#define LAN_IOSTART (NONCACHE_OFFSET | 0x300) +#define LAN_IOEND (NONCACHE_OFFSET | 0x320) static inline void *_port2addr_ne(unsigned long port) { - return (void *)(port + NONCACHE_OFFSET + 0x10000000); + return (void *)(port + 0x10000000); } static inline void *_port2addr_usb(unsigned long port) diff -uNpr linux-2.6.14.6/arch/m32r/kernel/io_oaks32r.c linux-2.6.14.6-20060127/arch/m32r/kernel/io_oaks32r.c --- linux-2.6.14.6/arch/m32r/kernel/io_oaks32r.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/io_oaks32r.c 2006-01-27 19:00:31.680537028 +0900 @@ -16,7 +16,7 @@ static inline void *_port2addr(unsigned long port) { - return (void *)(port + NONCACHE_OFFSET); + return (void *)(port | (NONCACHE_OFFSET)); } static inline void *_port2addr_ne(unsigned long port) diff -uNpr linux-2.6.14.6/arch/m32r/kernel/io_opsput.c linux-2.6.14.6-20060127/arch/m32r/kernel/io_opsput.c --- linux-2.6.14.6/arch/m32r/kernel/io_opsput.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/io_opsput.c 2006-01-27 19:00:31.726529763 +0900 @@ -36,7 +36,7 @@ extern void pcc_iowrite_word(int, unsign static inline void *_port2addr(unsigned long port) { - return (void *)(port + NONCACHE_OFFSET); + return (void *)(port | (NONCACHE_OFFSET)); } /* @@ -44,11 +44,11 @@ static inline void *_port2addr(unsigned * from 0x10000000 to 0x13ffffff on physical address. * The base address of LAN controller(LAN91C111) is 0x300. */ -#define LAN_IOSTART 0x300 -#define LAN_IOEND 0x320 +#define LAN_IOSTART (NONCACHE_OFFSET | 0x300) +#define LAN_IOEND (NONCACHE_OFFSET | 0x320) static inline void *_port2addr_ne(unsigned long port) { - return (void *)(port + NONCACHE_OFFSET + 0x10000000); + return (void *)(port + 0x10000000); } static inline void *_port2addr_usb(unsigned long port) { diff -uNpr linux-2.6.14.6/arch/m32r/kernel/io_usrv.c linux-2.6.14.6-20060127/arch/m32r/kernel/io_usrv.c --- linux-2.6.14.6/arch/m32r/kernel/io_usrv.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/io_usrv.c 2006-01-27 19:00:31.736528183 +0900 @@ -47,7 +47,7 @@ static inline void *_port2addr(unsigned else if (port >= UART1_IOSTART && port <= UART1_IOEND) port = ((port - UART1_IOSTART) << 1) + UART1_REGSTART; #endif /* CONFIG_SERIAL_8250 || CONFIG_SERIAL_8250_MODULE */ - return (void *)(port + NONCACHE_OFFSET); + return (void *)(port | (NONCACHE_OFFSET)); } static inline void delay(void) diff -uNpr linux-2.6.14.6/arch/m32r/kernel/process.c linux-2.6.14.6-20060127/arch/m32r/kernel/process.c --- linux-2.6.14.6/arch/m32r/kernel/process.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/process.c 2006-01-27 19:00:31.764523761 +0900 @@ -110,6 +110,14 @@ void cpu_idle (void) void machine_restart(char *__unused) { +#ifdef CONFIG_M32700UT_MCU + char buf=0; + mcu_out(&buf,1,0x71); + buf=0x41; + mcu_out(&buf,1,0x70); + + /* never reach */ +#endif printk("Please push reset button!\n"); while (1) cpu_relax(); @@ -124,7 +132,15 @@ void machine_halt(void) void machine_power_off(void) { - /* M32R_FIXME */ +#ifdef CONFIG_M32700UT_MCU + char buf=0; + mcu_out(&buf,1,0x71); + mcu_out(&buf,1,0x70); + + /* never reach */ +#endif + while (1) + cpu_relax(); } static int __init idle_setup (char *str) diff -uNpr linux-2.6.14.6/arch/m32r/kernel/setup.c linux-2.6.14.6-20060127/arch/m32r/kernel/setup.c --- linux-2.6.14.6/arch/m32r/kernel/setup.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/setup.c 2006-01-27 19:00:31.804517444 +0900 @@ -305,41 +305,46 @@ static int show_cpuinfo(struct seq_file seq_printf(m, "processor\t: %ld\n", cpu); -#ifdef CONFIG_CHIP_VDEC2 +#if defined(CONFIG_CHIP_VDEC2) seq_printf(m, "cpu family\t: VDEC2\n" "cache size\t: Unknown\n"); -#elif CONFIG_CHIP_M32700 +#elif defined(CONFIG_CHIP_M32700) seq_printf(m,"cpu family\t: M32700\n" "cache size\t: I-8KB/D-8KB\n"); -#elif CONFIG_CHIP_M32102 +#elif defined(CONFIG_CHIP_M32102) seq_printf(m,"cpu family\t: M32102\n" "cache size\t: I-8KB\n"); -#elif CONFIG_CHIP_OPSP +#elif defined(CONFIG_CHIP_OPSP) seq_printf(m,"cpu family\t: OPSP\n" "cache size\t: I-8KB/D-8KB\n"); -#elif CONFIG_CHIP_MP +#elif defined(CONFIG_CHIP_MP) seq_printf(m, "cpu family\t: M32R-MP\n" "cache size\t: I-xxKB/D-xxKB\n"); +#elif defined(CONFIG_CHIP_M32104) + seq_printf(m,"cpu family\t: M32104\n" + "cache size\t: I-8KB/D-8KB\n"); #else seq_printf(m, "cpu family\t: Unknown\n"); #endif seq_printf(m, "bogomips\t: %lu.%02lu\n", c->loops_per_jiffy/(500000/HZ), (c->loops_per_jiffy/(5000/HZ)) % 100); -#ifdef CONFIG_PLAT_MAPPI +#if defined(CONFIG_PLAT_MAPPI) seq_printf(m, "Machine\t\t: Mappi Evaluation board\n"); -#elif CONFIG_PLAT_MAPPI2 +#elif defined(CONFIG_PLAT_MAPPI2) seq_printf(m, "Machine\t\t: Mappi-II Evaluation board\n"); -#elif CONFIG_PLAT_MAPPI3 +#elif defined(CONFIG_PLAT_MAPPI3) seq_printf(m, "Machine\t\t: Mappi-III Evaluation board\n"); -#elif CONFIG_PLAT_M32700UT +#elif defined(CONFIG_PLAT_M32700UT) seq_printf(m, "Machine\t\t: M32700UT Evaluation board\n"); -#elif CONFIG_PLAT_OPSPUT +#elif defined(CONFIG_PLAT_OPSPUT) seq_printf(m, "Machine\t\t: OPSPUT Evaluation board\n"); -#elif CONFIG_PLAT_USRV +#elif defined(CONFIG_PLAT_USRV) seq_printf(m, "Machine\t\t: uServer\n"); -#elif CONFIG_PLAT_OAKS32R +#elif defined(CONFIG_PLAT_OAKS32R) seq_printf(m, "Machine\t\t: OAKS32R\n"); +#elif defined(CONFIG_PLAT_M32104UT) + seq_printf(m, "Machine\t\t: M32104UT Evaluation board\n"); #else seq_printf(m, "Machine\t\t: Unknown\n"); #endif @@ -389,7 +394,7 @@ unsigned long cpu_initialized __initdata */ #if defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \ || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \ - || defined(CONFIG_CHIP_OPSP) + || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) void __init cpu_init (void) { int cpu_id = smp_processor_id(); diff -uNpr linux-2.6.14.6/arch/m32r/kernel/setup_m32104ut.c linux-2.6.14.6-20060127/arch/m32r/kernel/setup_m32104ut.c --- linux-2.6.14.6/arch/m32r/kernel/setup_m32104ut.c 1970-01-01 09:00:00.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/setup_m32104ut.c 2006-01-27 19:00:31.825514127 +0900 @@ -0,0 +1,159 @@ +/* + * linux/arch/m32r/kernel/setup_m32104ut.c + * + * Setup routines for M32104UT Board + * + * Copyright (c) 2002-2005 Hiroyuki Kondo, Hirokazu Takata, + * Hitoshi Yamamoto, Mamoru Sakugawa + */ + +#include +#include +#include +#include +#include + +#include +#include +#include + +#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) + +#ifndef CONFIG_SMP +static icu_data_t icu_data[NR_IRQS]; +#else +icu_data_t icu_data[NR_IRQS]; +#endif /* CONFIG_SMP */ + +static void disable_m32104ut_irq(unsigned int irq) +{ + unsigned long port, data; + + port = irq2port(irq); + data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; + outl(data, port); +} + +static void enable_m32104ut_irq(unsigned int irq) +{ + unsigned long port, data; + + port = irq2port(irq); + data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; + outl(data, port); +} + +static void mask_and_ack_m32104ut(unsigned int irq) +{ + disable_m32104ut_irq(irq); +} + +static void end_m32104ut_irq(unsigned int irq) +{ + enable_m32104ut_irq(irq); +} + +static unsigned int startup_m32104ut_irq(unsigned int irq) +{ + enable_m32104ut_irq(irq); + return (0); +} + +static void shutdown_m32104ut_irq(unsigned int irq) +{ + unsigned long port; + + port = irq2port(irq); + outl(M32R_ICUCR_ILEVEL7, port); +} + +static struct hw_interrupt_type m32104ut_irq_type = +{ + .typename = "M32104UT-IRQ", + .startup = startup_m32104ut_irq, + .shutdown = shutdown_m32104ut_irq, + .enable = enable_m32104ut_irq, + .disable = disable_m32104ut_irq, + .ack = mask_and_ack_m32104ut, + .end = end_m32104ut_irq +}; + +void __init init_IRQ(void) +{ + static int once = 0; + + if (once) + return; + else + once++; + +#if defined(CONFIG_SMC91X) + /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/ + irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; + irq_desc[M32R_IRQ_INT0].handler = &m32104ut_irq_type; + irq_desc[M32R_IRQ_INT0].action = 0; + irq_desc[M32R_IRQ_INT0].depth = 1; + icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; /* "H" level sense */ + disable_m32104ut_irq(M32R_IRQ_INT0); +#endif /* CONFIG_SMC91X */ + + /* MFT2 : system timer */ + irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; + irq_desc[M32R_IRQ_MFT2].handler = &m32104ut_irq_type; + irq_desc[M32R_IRQ_MFT2].action = 0; + irq_desc[M32R_IRQ_MFT2].depth = 1; + icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; + disable_m32104ut_irq(M32R_IRQ_MFT2); + +#ifdef CONFIG_SERIAL_M32R_SIO + /* SIO0_R : uart receive data */ + irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; + irq_desc[M32R_IRQ_SIO0_R].handler = &m32104ut_irq_type; + irq_desc[M32R_IRQ_SIO0_R].action = 0; + irq_desc[M32R_IRQ_SIO0_R].depth = 1; + icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN; + disable_m32104ut_irq(M32R_IRQ_SIO0_R); + + /* SIO0_S : uart send data */ + irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; + irq_desc[M32R_IRQ_SIO0_S].handler = &m32104ut_irq_type; + irq_desc[M32R_IRQ_SIO0_S].action = 0; + irq_desc[M32R_IRQ_SIO0_S].depth = 1; + icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN; + disable_m32104ut_irq(M32R_IRQ_SIO0_S); +#endif /* CONFIG_SERIAL_M32R_SIO */ +} + +#if defined(CONFIG_SMC91X) + +#define LAN_IOSTART 0x300 +#define LAN_IOEND 0x320 +static struct resource smc91x_resources[] = { + [0] = { + .start = (LAN_IOSTART), + .end = (LAN_IOEND), + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = M32R_IRQ_INT0, + .end = M32R_IRQ_INT0, + .flags = IORESOURCE_IRQ, + } +}; + +static struct platform_device smc91x_device = { + .name = "smc91x", + .id = 0, + .num_resources = ARRAY_SIZE(smc91x_resources), + .resource = smc91x_resources, +}; +#endif + +static int __init platform_init(void) +{ +#if defined(CONFIG_SMC91X) + platform_device_register(&smc91x_device); +#endif + return 0; +} +arch_initcall(platform_init); diff -uNpr linux-2.6.14.6/arch/m32r/kernel/setup_m32700ut.c linux-2.6.14.6-20060127/arch/m32r/kernel/setup_m32700ut.c --- linux-2.6.14.6/arch/m32r/kernel/setup_m32700ut.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/setup_m32700ut.c 2006-01-27 19:00:31.855509389 +0900 @@ -27,15 +27,11 @@ #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) #ifndef CONFIG_SMP -typedef struct { - unsigned long icucr; /* ICU Control Register */ -} icu_data_t; static icu_data_t icu_data[M32700UT_NUM_CPU_IRQ]; #else icu_data_t icu_data[M32700UT_NUM_CPU_IRQ]; #endif /* CONFIG_SMP */ - static void disable_m32700ut_irq(unsigned int irq) { unsigned long port, data; @@ -430,6 +426,15 @@ void __init init_IRQ(void) lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */ disable_m32700ut_lcdpld_irq(M32700UT_LCD_IRQ_USB_INT1); #endif + +#if defined(CONFIG_M32700UT_TS) + irq_desc[M32700UT_LCD_IRQ_BAT_INT].status = IRQ_DISABLED; + irq_desc[M32700UT_LCD_IRQ_BAT_INT].handler = &m32700ut_lcdpld_irq_type; + irq_desc[M32700UT_LCD_IRQ_BAT_INT].action = 0; + irq_desc[M32700UT_LCD_IRQ_BAT_INT].depth = 1; + lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_BAT_INT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; /* "H" level sense */ + disable_m32700ut_lcdpld_irq(M32700UT_LCD_IRQ_BAT_INT); +#endif /* * INT2# is used for BAT, USB, AUDIO * We enable it here. diff -uNpr linux-2.6.14.6/arch/m32r/kernel/setup_mappi.c linux-2.6.14.6-20060127/arch/m32r/kernel/setup_mappi.c --- linux-2.6.14.6/arch/m32r/kernel/setup_mappi.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/setup_mappi.c 2006-01-27 19:00:31.880505441 +0900 @@ -20,12 +20,10 @@ #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) #ifndef CONFIG_SMP -typedef struct { - unsigned long icucr; /* ICU Control Register */ -} icu_data_t; -#endif /* CONFIG_SMP */ - +static icu_data_t icu_data[NR_IRQS]; +#else icu_data_t icu_data[NR_IRQS]; +#endif /* CONFIG_SMP */ static void disable_mappi_irq(unsigned int irq) { diff -uNpr linux-2.6.14.6/arch/m32r/kernel/setup_mappi2.c linux-2.6.14.6-20060127/arch/m32r/kernel/setup_mappi2.c --- linux-2.6.14.6/arch/m32r/kernel/setup_mappi2.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/setup_mappi2.c 2006-01-27 19:00:31.905501493 +0900 @@ -20,12 +20,10 @@ #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) #ifndef CONFIG_SMP -typedef struct { - unsigned long icucr; /* ICU Control Register */ -} icu_data_t; -#endif /* CONFIG_SMP */ - +static icu_data_t icu_data[NR_IRQS]; +#else icu_data_t icu_data[NR_IRQS]; +#endif /* CONFIG_SMP */ static void disable_mappi2_irq(unsigned int irq) { diff -uNpr linux-2.6.14.6/arch/m32r/kernel/setup_mappi3.c linux-2.6.14.6-20060127/arch/m32r/kernel/setup_mappi3.c --- linux-2.6.14.6/arch/m32r/kernel/setup_mappi3.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/setup_mappi3.c 2006-01-27 19:00:31.930497544 +0900 @@ -20,12 +20,10 @@ #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) #ifndef CONFIG_SMP -typedef struct { - unsigned long icucr; /* ICU Control Register */ -} icu_data_t; -#endif /* CONFIG_SMP */ - +static icu_data_t icu_data[NR_IRQS]; +#else icu_data_t icu_data[NR_IRQS]; +#endif /* CONFIG_SMP */ static void disable_mappi3_irq(unsigned int irq) { diff -uNpr linux-2.6.14.6/arch/m32r/kernel/setup_oaks32r.c linux-2.6.14.6-20060127/arch/m32r/kernel/setup_oaks32r.c --- linux-2.6.14.6/arch/m32r/kernel/setup_oaks32r.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/setup_oaks32r.c 2006-01-27 19:00:31.952494070 +0900 @@ -19,12 +19,10 @@ #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) #ifndef CONFIG_SMP -typedef struct { - unsigned long icucr; /* ICU Control Register */ -} icu_data_t; -#endif /* CONFIG_SMP */ - +static icu_data_t icu_data[NR_IRQS]; +#else icu_data_t icu_data[NR_IRQS]; +#endif /* CONFIG_SMP */ static void disable_oaks32r_irq(unsigned int irq) { diff -uNpr linux-2.6.14.6/arch/m32r/kernel/setup_opsput.c linux-2.6.14.6-20060127/arch/m32r/kernel/setup_opsput.c --- linux-2.6.14.6/arch/m32r/kernel/setup_opsput.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/setup_opsput.c 2006-01-27 19:00:31.982489332 +0900 @@ -28,9 +28,6 @@ #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) #ifndef CONFIG_SMP -typedef struct { - unsigned long icucr; /* ICU Control Register */ -} icu_data_t; static icu_data_t icu_data[OPSPUT_NUM_CPU_IRQ]; #else icu_data_t icu_data[OPSPUT_NUM_CPU_IRQ]; diff -uNpr linux-2.6.14.6/arch/m32r/kernel/setup_usrv.c linux-2.6.14.6-20060127/arch/m32r/kernel/setup_usrv.c --- linux-2.6.14.6/arch/m32r/kernel/setup_usrv.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/setup_usrv.c 2006-01-27 19:00:32.007485384 +0900 @@ -18,13 +18,11 @@ #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long))) -#if !defined(CONFIG_SMP) -typedef struct { - unsigned long icucr; /* ICU Control Register */ -} icu_data_t; -#endif /* CONFIG_SMP */ - +#ifndef CONFIG_SMP +static icu_data_t icu_data[M32700UT_NUM_CPU_IRQ]; +#else icu_data_t icu_data[M32700UT_NUM_CPU_IRQ]; +#endif /* CONFIG_SMP */ static void disable_mappi_irq(unsigned int irq) { diff -uNpr linux-2.6.14.6/arch/m32r/kernel/signal.c linux-2.6.14.6-20060127/arch/m32r/kernel/signal.c --- linux-2.6.14.6/arch/m32r/kernel/signal.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/signal.c 2006-01-27 19:29:49.934894383 +0900 @@ -66,9 +66,9 @@ sys_rt_sigsuspend(sigset_t *unewset, siz asmlinkage int sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, unsigned long r2, unsigned long r3, unsigned long r4, - unsigned long r5, unsigned long r6, struct pt_regs regs) + unsigned long r5, unsigned long r6, struct pt_regs *regs) { - return do_sigaltstack(uss, uoss, regs.spu); + return do_sigaltstack(uss, uoss, regs->spu); } @@ -118,6 +118,8 @@ restore_sigcontext(struct pt_regs *regs, #elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) COPY(acch); COPY(accl); + COPY(dummy_acc1h); + COPY(dummy_acc1l); #else #error unknown isa configuration #endif @@ -140,11 +142,10 @@ restore_sigcontext(struct pt_regs *regs, asmlinkage int sys_rt_sigreturn(unsigned long r0, unsigned long r1, unsigned long r2, unsigned long r3, unsigned long r4, - unsigned long r5, unsigned long r6, struct pt_regs regs) + unsigned long r5, unsigned long r6, struct pt_regs *regs) { - struct rt_sigframe __user *frame = (struct rt_sigframe __user *)regs.spu; + struct rt_sigframe __user *frame = (struct rt_sigframe __user *)regs->spu; sigset_t set; - stack_t st; int result; if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) @@ -158,14 +159,11 @@ sys_rt_sigreturn(unsigned long r0, unsig recalc_sigpending(); spin_unlock_irq(¤t->sighand->siglock); - if (restore_sigcontext(®s, &frame->uc.uc_mcontext, &result)) + if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &result)) goto badframe; - if (__copy_from_user(&st, &frame->uc.uc_stack, sizeof(st))) + if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->spu) == -EFAULT) goto badframe; - /* It is more difficult to avoid calling this function than to - call it and ignore errors. */ - do_sigaltstack(&st, NULL, regs.spu); return result; @@ -207,6 +205,8 @@ setup_sigcontext(struct sigcontext __use #elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) COPY(acch); COPY(accl); + COPY(dummy_acc1h); + COPY(dummy_acc1l); #else #error unknown isa configuration #endif diff -uNpr linux-2.6.14.6/arch/m32r/kernel/signal.c.orig linux-2.6.14.6-20060127/arch/m32r/kernel/signal.c.orig --- linux-2.6.14.6/arch/m32r/kernel/signal.c.orig 1970-01-01 09:00:00.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/signal.c.orig 2006-01-27 19:00:32.034481119 +0900 @@ -0,0 +1,431 @@ +/* + * linux/arch/m32r/kernel/signal.c + * + * Copyright (c) 2003 Hitoshi Yamamoto + * + * Taken from i386 version. + * Copyright (C) 1991, 1992 Linus Torvalds + * + * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson + * 2000-06-20 Pentium III FXSR, SSE support by Gareth Hughes + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DEBUG_SIG 0 + +#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) + +int do_signal(struct pt_regs *, sigset_t *); + +asmlinkage int +sys_rt_sigsuspend(sigset_t *unewset, size_t sigsetsize, + unsigned long r2, unsigned long r3, unsigned long r4, + unsigned long r5, unsigned long r6, struct pt_regs regs) +{ + sigset_t saveset, newset; + + /* XXX: Don't preclude handling different sized sigset_t's. */ + if (sigsetsize != sizeof(sigset_t)) + return -EINVAL; + + if (copy_from_user(&newset, unewset, sizeof(newset))) + return -EFAULT; + sigdelsetmask(&newset, ~_BLOCKABLE); + + spin_lock_irq(¤t->sighand->siglock); + saveset = current->blocked; + current->blocked = newset; + recalc_sigpending(); + spin_unlock_irq(¤t->sighand->siglock); + + regs.r0 = -EINTR; + while (1) { + current->state = TASK_INTERRUPTIBLE; + schedule(); + if (do_signal(®s, &saveset)) + return regs.r0; + } +} + +asmlinkage int +sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, + unsigned long r2, unsigned long r3, unsigned long r4, + unsigned long r5, unsigned long r6, struct pt_regs *regs) +{ + return do_sigaltstack(uss, uoss, regs->spu); +} + + +/* + * Do a signal return; undo the signal stack. + */ + +struct rt_sigframe +{ + int sig; + struct siginfo *pinfo; + void *puc; + struct siginfo info; + struct ucontext uc; +// struct _fpstate fpstate; +}; + +static int +restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, + int *r0_p) +{ + unsigned int err = 0; + + /* Always make any pending restarted system calls return -EINTR */ + current_thread_info()->restart_block.fn = do_no_restart_syscall; + +#define COPY(x) err |= __get_user(regs->x, &sc->sc_##x) + COPY(r4); + COPY(r5); + COPY(r6); + COPY(pt_regs); + /* COPY(r0); Skip r0 */ + COPY(r1); + COPY(r2); + COPY(r3); + COPY(r7); + COPY(r8); + COPY(r9); + COPY(r10); + COPY(r11); + COPY(r12); +#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2) + COPY(acc0h); + COPY(acc0l); + COPY(acc1h); + COPY(acc1l); +#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) + COPY(acch); + COPY(accl); +#else +#error unknown isa configuration +#endif + COPY(psw); + COPY(bpc); + COPY(bbpsw); + COPY(bbpc); + COPY(spu); + COPY(fp); + COPY(lr); + COPY(spi); +#undef COPY + + regs->syscall_nr = -1; /* disable syscall checks */ + err |= __get_user(*r0_p, &sc->sc_r0); + + return err; +} + +asmlinkage int +sys_rt_sigreturn(unsigned long r0, unsigned long r1, + unsigned long r2, unsigned long r3, unsigned long r4, + unsigned long r5, unsigned long r6, struct pt_regs *regs) +{ + struct rt_sigframe __user *frame = (struct rt_sigframe __user *)regs->spu; + sigset_t set; + int result; + + if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) + goto badframe; + if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set))) + goto badframe; + + sigdelsetmask(&set, ~_BLOCKABLE); + spin_lock_irq(¤t->sighand->siglock); + current->blocked = set; + recalc_sigpending(); + spin_unlock_irq(¤t->sighand->siglock); + + if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &result)) + goto badframe; + + if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->spu) == -EFAULT) + goto badframe; + + return result; + +badframe: + force_sig(SIGSEGV, current); + return 0; +} + +/* + * Set up a signal frame. + */ + +static int +setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs, + unsigned long mask) +{ + int err = 0; + +#define COPY(x) err |= __put_user(regs->x, &sc->sc_##x) + COPY(r4); + COPY(r5); + COPY(r6); + COPY(pt_regs); + COPY(r0); + COPY(r1); + COPY(r2); + COPY(r3); + COPY(r7); + COPY(r8); + COPY(r9); + COPY(r10); + COPY(r11); + COPY(r12); +#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2) + COPY(acc0h); + COPY(acc0l); + COPY(acc1h); + COPY(acc1l); +#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) + COPY(acch); + COPY(accl); +#else +#error unknown isa configuration +#endif + COPY(psw); + COPY(bpc); + COPY(bbpsw); + COPY(bbpc); + COPY(spu); + COPY(fp); + COPY(lr); + COPY(spi); +#undef COPY + + err |= __put_user(mask, &sc->oldmask); + + return err; +} + +/* + * Determine which stack to use.. + */ +static inline void __user * +get_sigframe(struct k_sigaction *ka, unsigned long sp, size_t frame_size) +{ + /* This is the X/Open sanctioned signal stack switching. */ + if (ka->sa.sa_flags & SA_ONSTACK) { + if (sas_ss_flags(sp) == 0) + sp = current->sas_ss_sp + current->sas_ss_size; + } + + return (void __user *)((sp - frame_size) & -8ul); +} + +static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, + sigset_t *set, struct pt_regs *regs) +{ + struct rt_sigframe __user *frame; + int err = 0; + int signal; + + frame = get_sigframe(ka, regs->spu, sizeof(*frame)); + + if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) + goto give_sigsegv; + + signal = current_thread_info()->exec_domain + && current_thread_info()->exec_domain->signal_invmap + && sig < 32 + ? current_thread_info()->exec_domain->signal_invmap[sig] + : sig; + + err |= __put_user(signal, &frame->sig); + if (err) + goto give_sigsegv; + + err |= __put_user(&frame->info, &frame->pinfo); + err |= __put_user(&frame->uc, &frame->puc); + err |= copy_siginfo_to_user(&frame->info, info); + if (err) + goto give_sigsegv; + + /* Create the ucontext. */ + err |= __put_user(0, &frame->uc.uc_flags); + err |= __put_user(0, &frame->uc.uc_link); + err |= __put_user(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp); + err |= __put_user(sas_ss_flags(regs->spu), + &frame->uc.uc_stack.ss_flags); + err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size); + err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, set->sig[0]); + err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); + if (err) + goto give_sigsegv; + + /* Set up to return from userspace. */ + regs->lr = (unsigned long)ka->sa.sa_restorer; + + /* Set up registers for signal handler */ + regs->spu = (unsigned long)frame; + regs->r0 = signal; /* Arg for signal handler */ + regs->r1 = (unsigned long)&frame->info; + regs->r2 = (unsigned long)&frame->uc; + regs->bpc = (unsigned long)ka->sa.sa_handler; + + set_fs(USER_DS); + +#if DEBUG_SIG + printk("SIG deliver (%s:%d): sp=%p pc=%p\n", + current->comm, current->pid, frame, regs->pc); +#endif + + return; + +give_sigsegv: + force_sigsegv(sig, current); +} + +/* + * OK, we're invoking a handler + */ + +static void +handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info, + sigset_t *oldset, struct pt_regs *regs) +{ + unsigned short inst; + + /* Are we from a system call? */ + if (regs->syscall_nr >= 0) { + /* If so, check system call restarting.. */ + switch (regs->r0) { + case -ERESTART_RESTARTBLOCK: + case -ERESTARTNOHAND: + regs->r0 = -EINTR; + break; + + case -ERESTARTSYS: + if (!(ka->sa.sa_flags & SA_RESTART)) { + regs->r0 = -EINTR; + break; + } + /* fallthrough */ + case -ERESTARTNOINTR: + regs->r0 = regs->orig_r0; + inst = *(unsigned short *)(regs->bpc - 2); + if ((inst & 0xfff0) == 0x10f0) /* trap ? */ + regs->bpc -= 2; + else + regs->bpc -= 4; + } + } + + /* Set up the stack frame */ + setup_rt_frame(sig, ka, info, oldset, regs); + + spin_lock_irq(¤t->sighand->siglock); + sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask); + if (!(ka->sa.sa_flags & SA_NODEFER)) + sigaddset(¤t->blocked,sig); + recalc_sigpending(); + spin_unlock_irq(¤t->sighand->siglock); +} + +/* + * Note that 'init' is a special process: it doesn't get signals it doesn't + * want to handle. Thus you cannot kill init even with a SIGKILL even by + * mistake. + */ +int do_signal(struct pt_regs *regs, sigset_t *oldset) +{ + siginfo_t info; + int signr; + struct k_sigaction ka; + unsigned short inst; + + /* + * We want the common case to go fast, which + * is why we may in certain cases get here from + * kernel mode. Just return without doing anything + * if so. + */ + if (!user_mode(regs)) + return 1; + + if (try_to_freeze()) + goto no_signal; + + if (!oldset) + oldset = ¤t->blocked; + + signr = get_signal_to_deliver(&info, &ka, regs, NULL); + if (signr > 0) { + /* Reenable any watchpoints before delivering the + * signal to user space. The processor register will + * have been cleared if the watchpoint triggered + * inside the kernel. + */ + + /* Whee! Actually deliver the signal. */ + handle_signal(signr, &ka, &info, oldset, regs); + return 1; + } + + no_signal: + /* Did we come from a system call? */ + if (regs->syscall_nr >= 0) { + /* Restart the system call - no handlers present */ + if (regs->r0 == -ERESTARTNOHAND || + regs->r0 == -ERESTARTSYS || + regs->r0 == -ERESTARTNOINTR) { + regs->r0 = regs->orig_r0; + inst = *(unsigned short *)(regs->bpc - 2); + if ((inst & 0xfff0) == 0x10f0) /* trap ? */ + regs->bpc -= 2; + else + regs->bpc -= 4; + } + if (regs->r0 == -ERESTART_RESTARTBLOCK){ + regs->r0 = regs->orig_r0; + regs->r7 = __NR_restart_syscall; + inst = *(unsigned short *)(regs->bpc - 2); + if ((inst & 0xfff0) == 0x10f0) /* trap ? */ + regs->bpc -= 2; + else + regs->bpc -= 4; + } + } + return 0; +} + +/* + * notification of userspace execution resumption + * - triggered by current->work.notify_resume + */ +void do_notify_resume(struct pt_regs *regs, sigset_t *oldset, + __u32 thread_info_flags) +{ + /* Pending single-step? */ + if (thread_info_flags & _TIF_SINGLESTEP) + clear_thread_flag(TIF_SINGLESTEP); + + /* deal with pending signal delivery */ + if (thread_info_flags & _TIF_SIGPENDING) + do_signal(regs,oldset); + + clear_thread_flag(TIF_IRET); +} diff -uNpr linux-2.6.14.6/arch/m32r/kernel/sys_m32r.c linux-2.6.14.6-20060127/arch/m32r/kernel/sys_m32r.c --- linux-2.6.14.6/arch/m32r/kernel/sys_m32r.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/sys_m32r.c 2006-01-27 19:00:32.069475592 +0900 @@ -41,7 +41,8 @@ asmlinkage int sys_tas(int *addr) return -EFAULT; local_irq_save(flags); oldval = *addr; - *addr = 1; + if (!oldval) + *addr = 1; local_irq_restore(flags); return oldval; } @@ -59,7 +60,8 @@ asmlinkage int sys_tas(int *addr) _raw_spin_lock(&tas_lock); oldval = *addr; - *addr = 1; + if (!oldval) + *addr = 1; _raw_spin_unlock(&tas_lock); return oldval; diff -uNpr linux-2.6.14.6/arch/m32r/kernel/time.c linux-2.6.14.6-20060127/arch/m32r/kernel/time.c --- linux-2.6.14.6/arch/m32r/kernel/time.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/kernel/time.c 2006-01-27 19:00:32.095471485 +0900 @@ -61,7 +61,7 @@ static unsigned long do_gettimeoffset(vo #if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \ || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \ - || defined(CONFIG_CHIP_OPSP) + || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) #ifndef CONFIG_SMP unsigned long count; @@ -272,7 +272,7 @@ void __init time_init(void) #if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \ || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \ - || defined(CONFIG_CHIP_OPSP) + || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) /* M32102 MFT setup */ setup_irq(M32R_IRQ_MFT2, &irq0); diff -uNpr linux-2.6.14.6/arch/m32r/lib/usercopy.c linux-2.6.14.6-20060127/arch/m32r/lib/usercopy.c --- linux-2.6.14.6/arch/m32r/lib/usercopy.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/lib/usercopy.c 2006-01-27 19:00:32.139464536 +0900 @@ -64,7 +64,7 @@ do { \ " .balign 4\n" \ " .long 0b,3b\n" \ ".previous" \ - : "=r"(res), "=r"(count), "=&r" (__d0), "=&r" (__d1), \ + : "=&r"(res), "=&r"(count), "=&r" (__d0), "=&r" (__d1), \ "=&r" (__d2) \ : "i"(-EFAULT), "0"(count), "1"(count), "3"(src), \ "4"(dst) \ @@ -101,7 +101,7 @@ do { \ " .balign 4\n" \ " .long 0b,3b\n" \ ".previous" \ - : "=r"(res), "=r"(count), "=&r" (__d0), "=&r" (__d1), \ + : "=&r"(res), "=&r"(count), "=&r" (__d0), "=&r" (__d1), \ "=&r" (__d2) \ : "i"(-EFAULT), "0"(count), "1"(count), "3"(src), \ "4"(dst) \ diff -uNpr linux-2.6.14.6/arch/m32r/m32104ut/defconfig.m32104ut linux-2.6.14.6-20060127/arch/m32r/m32104ut/defconfig.m32104ut --- linux-2.6.14.6/arch/m32r/m32104ut/defconfig.m32104ut 1970-01-01 09:00:00.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/m32104ut/defconfig.m32104ut 2006-01-27 19:00:32.161461062 +0900 @@ -0,0 +1,657 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.14 +# Wed Nov 9 16:04:51 2005 +# +CONFIG_M32R=y +# CONFIG_UID16 is not set +CONFIG_GENERIC_ISA_DMA=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_CLEAN_COMPILE=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +CONFIG_HOTPLUG=y +# CONFIG_KOBJECT_UEVENT is not set +# CONFIG_IKCONFIG is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_EMBEDDED=y +# CONFIG_KALLSYMS is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_BASE_FULL=y +# CONFIG_FUTEX is not set +# CONFIG_EPOLL is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_CC_ALIGN_FUNCTIONS=0 +CONFIG_CC_ALIGN_LABELS=0 +CONFIG_CC_ALIGN_LOOPS=0 +CONFIG_CC_ALIGN_JUMPS=0 +CONFIG_TINY_SHMEM=y +CONFIG_BASE_SMALL=0 + +# +# Loadable module support +# +# CONFIG_MODULES is not set + +# +# Processor type and features +# +# CONFIG_PLAT_MAPPI is not set +# CONFIG_PLAT_USRV is not set +# CONFIG_PLAT_M32700UT is not set +# CONFIG_PLAT_OPSPUT is not set +# CONFIG_PLAT_OAKS32R is not set +# CONFIG_PLAT_MAPPI2 is not set +# CONFIG_PLAT_MAPPI3 is not set +CONFIG_PLAT_M32104UT=y +# CONFIG_CHIP_M32700 is not set +# CONFIG_CHIP_M32102 is not set +CONFIG_CHIP_M32104=y +# CONFIG_CHIP_VDEC2 is not set +# CONFIG_CHIP_OPSP is not set +CONFIG_ISA_M32R=y +CONFIG_BUS_CLOCK=54000000 +CONFIG_TIMER_DIVIDE=128 +# CONFIG_CPU_LITTLE_ENDIAN is not set +CONFIG_MEMORY_START=04000000 +CONFIG_MEMORY_SIZE=01000000 +CONFIG_NOHIGHMEM=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set +CONFIG_GENERIC_CALIBRATE_DELAY=y +# CONFIG_PREEMPT is not set +# CONFIG_SMP is not set + +# +# Bus options (PCI, PCMCIA, EISA, MCA, ISA) +# +# CONFIG_ISA is not set + +# +# PCCARD (PCMCIA/CardBus) support +# +CONFIG_PCCARD=y +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=y +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_IOCTL=y + +# +# PC-card bridges +# + +# +# PCI Hotplug Support +# + +# +# Executable file formats +# +CONFIG_BINFMT_FLAT=y +# CONFIG_BINFMT_ZFLAT is not set +# CONFIG_BINFMT_SHARED_FLAT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_PACKET is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_BIC=y +# CONFIG_IPV6 is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set +# CONFIG_NET_CLS_ROUTE is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_IEEE80211 is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_DEBUG_DRIVER is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# +# Memory Technology Devices (MTD) +# +# CONFIG_MTD is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +CONFIG_BLK_DEV_NBD=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +CONFIG_BLK_DEV_INITRD=y +# CONFIG_CDROM_PKTCDVD is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# I2O device support +# + +# +# Network device support +# +CONFIG_NETDEVICES=y +CONFIG_DUMMY=y +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# PHY device support +# +# CONFIG_PHYLIB is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +CONFIG_SMC91X=y +# CONFIG_NE2000 is not set + +# +# Ethernet (1000 Mbit) +# + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# PCMCIA network device support +# +# CONFIG_NET_PCMCIA is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +# CONFIG_INPUT is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_SERIAL_M32R_SIO=y +CONFIG_SERIAL_M32R_SIO_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +CONFIG_SOFT_WATCHDOG=y +# CONFIG_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set + +# +# Ftape, the floppy tape device driver +# + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support +# +# CONFIG_HWMON is not set +# CONFIG_HWMON_VID is not set + +# +# Misc devices +# + +# +# Multimedia Capabilities Port drivers +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +# CONFIG_USB_ARCH_HAS_HCD is not set +# CONFIG_USB_ARCH_HAS_OHCI is not set + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# InfiniBand support +# + +# +# SN Devices +# + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_INOTIFY is not set +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=932 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_RELAYFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +CONFIG_NLS_CODEPAGE_932=y +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +# CONFIG_NLS_ISO8859_1 is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=y + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_DEBUG_KERNEL=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_FS is not set +# CONFIG_FRAME_POINTER is not set +# CONFIG_DEBUG_STACKOVERFLOW is not set +# CONFIG_DEBUG_STACK_USAGE is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC32=y +CONFIG_LIBCRC32C=y +CONFIG_ZLIB_INFLATE=y diff -uNpr linux-2.6.14.6/arch/m32r/mm/cache.c linux-2.6.14.6-20060127/arch/m32r/mm/cache.c --- linux-2.6.14.6/arch/m32r/mm/cache.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/arch/m32r/mm/cache.c 2006-01-27 19:00:32.195455692 +0900 @@ -26,6 +26,16 @@ #define MCCR ((volatile unsigned char*)0xfffffffe) #define MCCR_IIV (1UL << 0) /* I-cache invalidate */ #define MCCR_ICACHE_INV MCCR_IIV +#elif defined(CONFIG_CHIP_M32104) +#define MCCR ((volatile unsigned long*)0xfffffffc) +#define MCCR_IIV (1UL << 8) /* I-cache invalidate */ +#define MCCR_DIV (1UL << 9) /* D-cache invalidate */ +#define MCCR_DCB (1UL << 10) /* D-cache copy back */ +#define MCCR_ICM (1UL << 0) /* I-cache mode [0:off,1:on] */ +#define MCCR_DCM (1UL << 1) /* D-cache mode [0:off,1:on] */ +#define MCCR_ICACHE_INV MCCR_IIV +#define MCCR_DCACHE_CB MCCR_DCB +#define MCCR_DCACHE_CBINV (MCCR_DIV|MCCR_DCB) #endif /* CONFIG_CHIP_XNUX2 || CONFIG_CHIP_M32700 */ #ifndef MCCR diff -uNpr linux-2.6.14.6/drivers/char/ds1302.c linux-2.6.14.6-20060127/drivers/char/ds1302.c --- linux-2.6.14.6/drivers/char/ds1302.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/drivers/char/ds1302.c 2006-01-27 20:00:51.931736428 +0900 @@ -4,7 +4,7 @@ *! *! DESCRIPTION: Implements an interface for the DS1302 RTC *! -*! Functions exported: ds1302_readreg, ds1302_writereg, ds1302_init, get_rtc_status +*! Functions exported: ds1302_readreg, ds1302_writereg, ds1302_init *! *! --------------------------------------------------------------------------- *! @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -30,26 +31,29 @@ #include #endif -#define RTC_MAJOR_NR 121 /* local major, change later */ +#define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */ static const char ds1302_name[] = "ds1302"; +static DECLARE_WAIT_QUEUE_HEAD(ds1302_wait); +static DEFINE_SPINLOCK(ds1302_lock); +static unsigned char ds1302_status; /* bitmapped status byte. */ + /* Send 8 bits. */ static void out_byte_rtc(unsigned int reg_addr, unsigned char x) { //RST H - outw(0x0001,(unsigned long)PLD_RTCRSTODT); + outw(0x0001, (unsigned long)PLD_RTCRSTODT); //write data - outw(((x<<8)|(reg_addr&0xff)),(unsigned long)PLD_RTCWRDATA); + outw(((x<<8)|(reg_addr&0xff)), (unsigned long)PLD_RTCWRDATA); //WE - outw(0x0002,(unsigned long)PLD_RTCCR); + outw(0x0002, (unsigned long)PLD_RTCCR); //wait while(inw((unsigned long)PLD_RTCCR)); //RST L - outw(0x0000,(unsigned long)PLD_RTCRSTODT); - + outw(0x0000, (unsigned long)PLD_RTCRSTODT); } static unsigned char @@ -58,11 +62,11 @@ in_byte_rtc(unsigned int reg_addr) unsigned char retval; //RST H - outw(0x0001,(unsigned long)PLD_RTCRSTODT); + outw(0x0001, (unsigned long)PLD_RTCRSTODT); //write data - outw((reg_addr&0xff),(unsigned long)PLD_RTCRDDATA); + outw((reg_addr&0xff), (unsigned long)PLD_RTCRDDATA); //RE - outw(0x0001,(unsigned long)PLD_RTCCR); + outw(0x0001, (unsigned long)PLD_RTCCR); //wait while(inw((unsigned long)PLD_RTCCR)); @@ -70,7 +74,7 @@ in_byte_rtc(unsigned int reg_addr) retval=(inw((unsigned long)PLD_RTCRDDATA) & 0xff00)>>8; //RST L - outw(0x0000,(unsigned long)PLD_RTCRSTODT); + outw(0x0000, (unsigned long)PLD_RTCRSTODT); return retval; } @@ -80,7 +84,7 @@ in_byte_rtc(unsigned int reg_addr) static void ds1302_wenable(void) { - out_byte_rtc(0x8e,0x00); + out_byte_rtc(0x8e, 0x00); } /* Disable writing. */ @@ -88,7 +92,7 @@ ds1302_wenable(void) static void ds1302_wdisable(void) { - out_byte_rtc(0x8e,0x80); + out_byte_rtc(0x8e, 0x80); } @@ -111,17 +115,57 @@ void ds1302_writereg(int reg, unsigned char val) { ds1302_wenable(); - out_byte_rtc((0x80 | (reg << 1)),val); + out_byte_rtc((0x80 | (reg << 1)), val); ds1302_wdisable(); } -void +static ssize_t +ds1302_read(struct file *file, char *buf, + size_t count, loff_t *ppos) +{ + return -EIO; +} + +static unsigned int +ds1302_poll(struct file *file, poll_table *wait) +{ + poll_wait(file, &ds1302_wait, wait); + + return 0; +} + +static int +ds1302_open(struct inode *inode, struct file *file) +{ + spin_lock_irq(&ds1302_lock); + + if (ds1302_status & RTC_IS_OPEN) + goto out_busy; + + ds1302_status |= RTC_IS_OPEN; + + spin_unlock_irq(&ds1302_lock); + return 0; + + out_busy: + spin_unlock_irq(&ds1302_lock); + return -EBUSY; +} + +static int +ds1302_release(struct inode *inode, struct file *file) +{ + ds1302_status &= ~RTC_IS_OPEN; + + return 0; +} + +static void get_rtc_time(struct rtc_time *rtc_tm) { unsigned long flags; - local_irq_save(flags); - local_irq_disable(); + spin_lock_irqsave(&ds1302_lock, flags); rtc_tm->tm_sec = CMOS_READ(RTC_SECONDS); rtc_tm->tm_min = CMOS_READ(RTC_MINUTES); @@ -130,7 +174,7 @@ get_rtc_time(struct rtc_time *rtc_tm) rtc_tm->tm_mon = CMOS_READ(RTC_MONTH); rtc_tm->tm_year = CMOS_READ(RTC_YEAR); - local_irq_restore(flags); + spin_unlock_irqrestore(&ds1302_lock, flags); BCD_TO_BIN(rtc_tm->tm_sec); BCD_TO_BIN(rtc_tm->tm_min); @@ -156,7 +200,7 @@ static unsigned char days_in_mo[] = /* ioctl that supports RTC_RD_TIME and RTC_SET_TIME (read and set time/date). */ static int -rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd, +ds1302_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) { unsigned long flags; @@ -219,15 +263,14 @@ rtc_ioctl(struct inode *inode, struct fi BIN_TO_BCD(mon); BIN_TO_BCD(yrs); - local_irq_save(flags); - local_irq_disable(); + spin_lock_irqsave(&ds1302_lock, flags); CMOS_WRITE(yrs, RTC_YEAR); CMOS_WRITE(mon, RTC_MONTH); CMOS_WRITE(day, RTC_DAY_OF_MONTH); CMOS_WRITE(hrs, RTC_HOURS); CMOS_WRITE(min, RTC_MINUTES); CMOS_WRITE(sec, RTC_SECONDS); - local_irq_restore(flags); + spin_unlock_irqrestore(&ds1302_lock, flags); /* Notice that at this point, the RTC is updated but * the kernel is still running with the old time. @@ -256,7 +299,7 @@ rtc_ioctl(struct inode *inode, struct fi } } -int +static int get_rtc_status(char *buf) { char *p; @@ -283,9 +326,20 @@ get_rtc_status(char *buf) /* The various file operations we support. */ -static struct file_operations rtc_fops = { +static struct file_operations ds1302_fops = { .owner = THIS_MODULE, - .ioctl = rtc_ioctl, + .llseek = no_llseek, + .read = ds1302_read, + .poll = ds1302_poll, + .ioctl = ds1302_ioctl, + .open = ds1302_open, + .release = ds1302_release, +}; + +static struct miscdevice ds1302_dev = { + .minor = RTC_MINOR, + .name = "rtc", + .fops = &ds1302_fops, }; /* Probe for the chip by writing something to its RAM and try reading it back. */ @@ -297,20 +351,20 @@ ds1302_probe(void) { int retval, res, baur; - baur=(boot_cpu_data.bus_clock/(2*1000*1000)); + baur=boot_cpu_data.bus_clock/(2*1000*1000); - printk("%s: Set PLD_RTCBAUR = %d\n", ds1302_name,baur); + printk("%s: Set PLD_RTCBAUR = %d\n", ds1302_name, baur); - outw(0x0000,(unsigned long)PLD_RTCCR); - outw(0x0000,(unsigned long)PLD_RTCRSTODT); - outw(baur,(unsigned long)PLD_RTCBAUR); + outw(0x0000, (unsigned long)PLD_RTCCR); + outw(0x0000, (unsigned long)PLD_RTCRSTODT); + outw(baur, (unsigned long)PLD_RTCBAUR); /* Try to talk to timekeeper. */ ds1302_wenable(); /* write RAM byte 0 */ /* write something magic */ - out_byte_rtc(0xc0,MAGIC_PATTERN); + out_byte_rtc(0xc0, MAGIC_PATTERN); /* read RAM byte 0 */ if((res = in_byte_rtc(0xc1)) == MAGIC_PATTERN) { @@ -319,10 +373,10 @@ ds1302_probe(void) printk("%s: RTC found.\n", ds1302_name); get_rtc_status(buf); printk(buf); - retval = 1; + retval = 0; } else { printk("%s: RTC not found.\n", ds1302_name); - retval = 0; + retval = -ENODEV; } return retval; @@ -334,21 +388,29 @@ ds1302_probe(void) int __init ds1302_init(void) { - if (!ds1302_probe()) { - return -1; - } - return 0; + return ds1302_probe(); } static int __init ds1302_register(void) { - ds1302_init(); - if (register_chrdev(RTC_MAJOR_NR, ds1302_name, &rtc_fops)) { - printk(KERN_INFO "%s: unable to get major %d for rtc\n", - ds1302_name, RTC_MAJOR_NR); - return -1; - } + int err; + + err = ds1302_init(); + if (err) + return err; + + err = misc_register(&ds1302_dev); + if (err) + return err; + return 0; } +static void __exit ds1302_exit(void) +{ + misc_deregister(&ds1302_dev); +} + module_init(ds1302_register); +module_exit(ds1302_exit); +MODULE_ALIAS_MISCDEV(RTC_MINOR); diff -uNpr linux-2.6.14.6/drivers/m32r/Kconfig linux-2.6.14.6-20060127/drivers/m32r/Kconfig --- linux-2.6.14.6/drivers/m32r/Kconfig 1970-01-01 09:00:00.000000000 +0900 +++ linux-2.6.14.6-20060127/drivers/m32r/Kconfig 2006-01-27 19:00:32.227450638 +0900 @@ -0,0 +1,16 @@ + +menu "M32R drivers" + +config M32700UT_MCU + bool "Battery Control MCU driver" + depends on PLAT_M32700UT + +config M32700UT_TS + tristate "Touch Screen driver for M32700UT" + depends on M32700UT_MCU + +config M32700UT_BUTTON + tristate "button watcher" + depends on M32700UT_MCU && PROC_FS + +endmenu diff -uNpr linux-2.6.14.6/drivers/m32r/Makefile linux-2.6.14.6-20060127/drivers/m32r/Makefile --- linux-2.6.14.6/drivers/m32r/Makefile 1970-01-01 09:00:00.000000000 +0900 +++ linux-2.6.14.6-20060127/drivers/m32r/Makefile 2006-01-27 19:00:32.230450165 +0900 @@ -0,0 +1,7 @@ +# +# Makefile for the Linux/M32R driver +# + +obj-$(CONFIG_M32700UT_MCU) += m32700ut_mcu.o +obj-$(CONFIG_M32700UT_TS) += m32700ut_ts.o +obj-$(CONFIG_M32700UT_BUTTON) += m32700ut_button.o diff -uNpr linux-2.6.14.6/drivers/m32r/m32700ut_button.c linux-2.6.14.6-20060127/drivers/m32r/m32700ut_button.c --- linux-2.6.14.6/drivers/m32r/m32700ut_button.c 1970-01-01 09:00:00.000000000 +0900 +++ linux-2.6.14.6-20060127/drivers/m32r/m32700ut_button.c 2006-01-27 19:00:32.250447006 +0900 @@ -0,0 +1,53 @@ +/* + * M32700UT button watch driver + * + * (c) 2004 Hayato Fujiwara + */ + +#include +#include +#include + +static ssize_t m32700ut_button_read(struct file *file, char *buf, + size_t count, loff_t *ppos) +{ + char state[2], state_buf[3]; + + if (*ppos >= sizeof (state_buf)) + return 0; + + if (*ppos + count > sizeof (state_buf)) + count = sizeof (state_buf) - *ppos; + + mcu_in(state, 2, 0x64); + + state_buf[0] = state[0]; + state_buf[1] = state[1]; + state_buf[2] = '\n'; + if (copy_to_user(buf, &state_buf[*ppos], count)) + return -EFAULT; + + *ppos += count; + + return count; +} + +static struct file_operations m32700ut_button_fops = { + .read = m32700ut_button_read, +}; + +static struct proc_dir_entry *proc_root_button; + +static int __init m32700ut_button_init(void) +{ + printk("M32700UT button watcher\n"); + + proc_root_button = create_proc_entry("button", S_IRUGO, &proc_root); + if (proc_root_button) { + proc_root_button->owner = THIS_MODULE; + proc_root_button->proc_fops = &m32700ut_button_fops; + } + + return 0; +} +module_init(m32700ut_button_init); diff -uNpr linux-2.6.14.6/drivers/m32r/m32700ut_mcu.c linux-2.6.14.6-20060127/drivers/m32r/m32700ut_mcu.c --- linux-2.6.14.6/drivers/m32r/m32700ut_mcu.c 1970-01-01 09:00:00.000000000 +0900 +++ linux-2.6.14.6-20060127/drivers/m32r/m32700ut_mcu.c 2006-01-27 19:00:32.271443689 +0900 @@ -0,0 +1,195 @@ +/* + * m32700ut_mcu.c + * + * Copyright (C) 2004-2005 Takeo Takahashi, Hayato Fujiwara + * + * Simple I/O routines to communicate with battery control MCU(M16C), + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#undef M32700UT_MCU_DEBUG +#undef M32700UT_MCU_OLD_FW + +#ifdef M32700UT_MCU_DEBUG +#define DPRINTK(s) do { printk s; } while(0) +#else +#define DPRINTK(s) +#endif + +#ifdef M32700UT_MCU_DEBUG +void print_mcureg(void) +{ + printk("BATSIOCR = 0x%04x\n", inw_p(BATSIOCR)); + printk("BATSIOMOD = 0x%04x\n", inw_p(BATSIOMOD)); + printk("BATSIOSTS = 0x%04x\n", inw_p(BATSIOSTS)); + printk("BATSIOINTCR = 0x%04x\n", inw_p(BATSIOINTCR)); + printk("BATSIOBAUR = 0x%04x\n", inw_p(BATSIOBAUR)); +} +#endif + +static void mcu_outb(unsigned char ch) +{ + /* wait for buffer empty */ + while ((inw_p(BATSIOSTS) & BATSIOSTS_TEMP) == 0) ; + outw_p((unsigned short)ch, BATSIOTXB); + DPRINTK(("0x%02x ", ch)); +} + +static unsigned char mcu_inb(void) +{ + unsigned char ch; + + /* wait for receive data ready */ + while ((inw_p(BATSIOSTS) & BATSIOSTS_RXCP) == 0) ; + ch = (unsigned char)inw_p(BATSIORXB); + DPRINTK(("0x%02x ", ch)); + return ch; +} + +void mcu_in(unsigned char *buf, unsigned int len, unsigned short reg) +{ + unsigned char ch; + unsigned int i; + unsigned long flags; + + DPRINTK(("mcu_in(0x%p, %d, 0x%04x): ", buf, len, reg)); + + if (len > 0xfff) { + printk("mcu_in: data length too long\n"); + return; + } + + local_irq_save(flags); + + /* start code */ + mcu_outb(MCU_CMD_START); + + /* function code */ + if (len > 0xf) { + mcu_outb((unsigned char)(0x90 | len >> 8)); + mcu_outb((unsigned char)len); + } else { + mcu_outb((unsigned char)(0x80 | len)); + } + + /* register address */ + mcu_outb((unsigned char)(reg >> 8)); + mcu_outb((unsigned char)reg); + + /* ACK/NAK */ + ch = mcu_inb(); + if (ch == MCU_CMD_NAK) { + ch = mcu_inb(); /* error code */ + printk("mcu_in: received NAK (%02x)\n", ch); + goto end_restore_flags; + } + if (ch != MCU_CMD_ACK) { + printk("mcu_in: received invalid ACK code(0x%02x)\n", ch); + goto end_restore_flags; + } +#ifdef M32700UT_MCU_OLD_FW + len=1; + /* receive function code + ??? */ + for (i = ((len > 0xf)? 3:2); i > 0; i--) +#else + /* receive function code and register address */ + for (i = ((len > 0xf)? 4:3); i > 0; i--) +#endif + (void)mcu_inb(); + for (i = 0; i < len; i++) { + *buf = mcu_inb(); + buf++; + } +end_restore_flags: + local_irq_restore(flags); + DPRINTK(("\n")); +} + +void mcu_out(unsigned char *buf, unsigned int len, unsigned short reg) +{ + unsigned char ch; + unsigned int i; + unsigned long flags; + + DPRINTK(("mcu_out(0x%p, %d, 0x%04x): ", buf, len, reg)); + + if (len > 0xfff) { + printk("mcu_out: data length too long\n"); + return; + } + + local_irq_save(flags); + + /* start code */ + mcu_outb(MCU_CMD_START); + + /* function code */ + if (len > 0xf) { + mcu_outb((unsigned char)(0xd0 | len >> 8)); + mcu_outb((unsigned char)len); + } else { + mcu_outb((unsigned char)(0xc0 | len)); + } + + /* register address */ + mcu_outb((unsigned char)(reg >> 8)); + mcu_outb((unsigned char)reg); + + for (i = 0; i < len; i++) { + mcu_outb(*buf); + buf++; + } + + /* ACK/NAK */ + ch = mcu_inb(); + if (ch == MCU_CMD_NAK) { + ch = mcu_inb(); /* error code */ + printk("mcu_out: received NAK (%02x)\n", ch); + goto end_restore_flags; + } + if (ch != MCU_CMD_ACK) { + printk("mcu_out: received invalid ACK code(0x%02x)\n", ch); + goto end_restore_flags; + } +#ifdef M32700UT_MCU_OLD_FW + /* receive function */ + for (i = ((len > 0xf)? 2:1); i > 0; i--) +#else + /* receive function code/register address/write data */ + for (i = (((len > 0xf)? 4:3) + len); i > 0; i--) +#endif + (void)mcu_inb(); +end_restore_flags: + local_irq_restore(flags); + DPRINTK(("\n")); +} + +int __init init_mcu_hw(void) +{ + char version; + + printk("Initialize serial port for battery control MCU.\n"); + outw_p(0, BATSIOCR); /* disable */ + outw_p(BATSIOMOD_CTSS, BATSIOMOD); + outw_p(0, BATSIOINTCR); /* disable int. */ + outw_p(0x125, BATSIOBAUR); /* 38400bps */ + outw_p(BATSIOCR_TXEN | BATSIOCR_RXEN, BATSIOCR); /* enable */ +#ifdef M32700UT_MCU_DEBUG + print_mcureg(); +#endif + mcu_in(&version,1,0xa0); + printk(KERN_INFO "M32700UT MCU: ver. %d\n",version); + return 0; +} + +module_init(init_mcu_hw); diff -uNpr linux-2.6.14.6/drivers/m32r/m32700ut_ts.c linux-2.6.14.6-20060127/drivers/m32r/m32700ut_ts.c --- linux-2.6.14.6/drivers/m32r/m32700ut_ts.c 1970-01-01 09:00:00.000000000 +0900 +++ linux-2.6.14.6-20060127/drivers/m32r/m32700ut_ts.c 2006-01-27 19:00:32.292440373 +0900 @@ -0,0 +1,506 @@ +/* + * m32700ut_ts.c -- Touch screen driver for M32700UT + * + * Copyright (c) 2004 Takeo Takahashi + * + * Based on linux/drivers/char/ms77xxxx_ts.c + * Copyright (c) 2003 Lineo Solutions, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * Touch screen driver for M32700UT. + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#define ts_in(buf, len, addr) mcu_in((buf), (len), (addr)) +#define ts_out(buf, len, addr) mcu_out((buf), (len), (addr)) + +#undef TS_DEBUG +#ifdef TS_DEBUG +#define DPRINTK(fmt, args...) printk("%s: " fmt, __FUNCTION__ , ## args) +#else +#define DPRINTK(fmt, args...) +#endif + +#define TS_NAME "ts" +#define TS_MAJOR 252 + +#define BUFSIZE 128 + +#ifdef CONFIG_PM +#include +static struct pm_dev* m32700ut_ts_pm_dev; +#endif + +/* From Compaq's Touch Screen Specification version 0.2 (draft) */ +typedef struct { + short pressure; + short x; + short y; + short millisecs; +} TS_EVENT; + +static DECLARE_WAIT_QUEUE_HEAD(queue); +static struct fasync_struct* fasync; +static int raw_max_x, raw_max_y; +static int res_x, res_y; +static int raw_min_x, raw_min_y; +static int cal_ok, x_rev, y_rev, xyswap; +static int head = 0, tail = 0; +static TS_EVENT cur_data, buf[BUFSIZE]; +static int ts_state = 0; +static int ts_open_count; + + +static struct fasync_struct* fasync; + +static void print_par(void) +{ + printk(KERN_INFO " Kernel ==> cal_ok = %d\n",cal_ok); + printk(KERN_INFO " Kernel ==> raw_max_x = %d\n",raw_max_x); + printk(KERN_INFO " Kernel ==> raw_max_y = %d\n",raw_max_y); + printk(KERN_INFO " Kernel ==> res_x = %d\n",res_x); + printk(KERN_INFO " Kernel ==> res_y = %d\n",res_y); + printk(KERN_INFO " Kernel ==> raw_min_x = %d\n",raw_min_x); + printk(KERN_INFO " Kernel ==> raw_min_y = %d\n",raw_min_y); + printk(KERN_INFO " Kernel ==> xyswap = %d\n",xyswap); + printk(KERN_INFO " Kernel ==> x_rev = %d\n",x_rev); + printk(KERN_INFO " Kernel ==> y_rev = %d\n",y_rev); +} + +static void ts_clear(void) +{ + int i; + + head = tail = 0; + for (i = 0; i < BUFSIZE; i++) { + buf[i].pressure = 0; + buf[i].x = 0; + buf[i].y = 0; + buf[i].millisecs = 0; + } +} + +#if 0 +#define AVERAGE 3 +static int avg = 0; +static int avx = 0; +static int avy = 0; +static int b_state = 0; +#endif + +static void new_data(void) +{ +#if 0 + cur_data.x = 4000 - cur_data.x; + cur_data.y = 4000 - cur_data.y; + + if (cur_data.pressure) { + b_state = 1; + avx += cur_data.x; + avy += cur_data.y; + avg++; + if (avg == AVERAGE) { + cur_data.x = avx / AVERAGE; + cur_data.y = avy / AVERAGE; + avx = 0; + avy = 0; + avg = 0; + } + else + return; + } + else { + if (b_state == 0) + return; + + b_state = 0; + avx = 0; + avy = 0; + avg = 0; + } + + cur_data.millisecs = (short)jiffies; +#endif + buf[head] = cur_data; + + if (++head >= BUFSIZE) { + head = 0; + } + if ((head == tail) && (++tail >= BUFSIZE)) { + tail = 0; + } + + if (fasync) { + kill_fasync(&fasync, SIGIO, POLL_IN); + } + wake_up_interruptible(&queue); +} + +static TS_EVENT get_data(void) +{ + int last = tail; + + if (++tail == BUFSIZE) { + tail = 0; + } + return buf[last]; +} + +static void wait_for_action(void) +{ + unsigned char val = 0; + ts_out(&val, 1, MCU_TPLCR); /* TP stop */ + ts_out(&val, 1, MCU_TPLSR); /* clear status */ + + ts_open_count = 0; +} + +static void start_wait_for_action(void) +{ + unsigned char val; + + //val = TPLSCR_100MS; + val = TPLSCR_20MS; + ts_out(&val, 1, MCU_TPLSCR); /* Sampling 100ms */ + val = TPLCR_TP_STR | TPLCR_PEN_ONI + | TPLCR_PEN_OFFI | TPLCR_PEN_ONRE; + ts_out(&val, 1, MCU_TPLCR); /* TP start, down IE, up IE */ + val = 0; + ts_out(&val, 1, MCU_TPLSR); /* clear status */ +} + +static void stop_wait_for_action(void) +{ + unsigned char val = 0; + ts_out(&val, 1, MCU_TPLCR); /* TP stop */ +} + +static ssize_t m32700ut_ts_read(struct file* filp, char* buf, size_t count, loff_t* l) +{ + TS_EVENT t, out; + DECLARE_WAITQUEUE(wait, current); + int i; + + if (head == tail) { + if (filp->f_flags & O_NONBLOCK) + return -EAGAIN; + add_wait_queue(&queue, &wait); + current->state = TASK_INTERRUPTIBLE; + while ((head == tail) && !signal_pending(current)) { + schedule(); + current->state = TASK_INTERRUPTIBLE; + } + current->state = TASK_RUNNING; + remove_wait_queue(&queue, &wait); + } + + for (i = count; i >= sizeof(out); + i -= sizeof(out), buf += sizeof(out)) { + if (head == tail) + break; + t = get_data(); + out.pressure = t.pressure; + if (cal_ok) { + out.x = (x_rev) ? + ((raw_max_x - t.x) * res_x) / (raw_max_x - raw_min_x) : + ((t.x - raw_min_x) * res_x) / (raw_max_x - raw_min_x); + out.y = (y_rev) ? + ((raw_max_y - t.y) * res_y) / (raw_max_y - raw_min_y) : + ((t.y - raw_min_y) * res_y) / (raw_max_y - raw_min_y); + } + else { + out.x = t.x; + out.y = t.y; + } + out.millisecs = t.millisecs; + + copy_to_user(buf, &out, sizeof(out)); + } + DPRINTK("read(0x%04d, 0x%04d)\n", out.x, out.y); + + return count - i; +} + +static unsigned int m32700ut_ts_poll(struct file* filp, poll_table* wait) +{ + poll_wait(filp, &queue, wait); + if (head != tail) { + return POLLIN | POLLRDNORM; + } + return 0; +} + +static int m32700ut_ts_fasync(int fd, struct file* filp, int on) +{ + int ret = fasync_helper(fd, filp, on, &fasync); + if (ret < 0) + return ret; + + return 0; +} + +#if 0 +static ssize_t m32700ut_ts_write(struct file* filp, const char* buf, size_t count, loff_t* l) +{ + ssize_t rc = 0; + + return rc; +} +#endif + +static int m32700ut_ts_ioctl(struct inode* inode, struct file* filp, unsigned int cmd, unsigned long arg) +{ + switch (cmd) { + case 3: + raw_max_x = arg; + break; + case 4: + raw_max_y = arg; + break; + case 5: + res_x = arg; + break; + case 6: + res_y = arg; + break; + case 10: + raw_min_x = arg; + break; + case 11: + raw_min_y = arg; + break; + case 12: + xyswap = arg; + case 13: + /* 0 = Enable calibration ; 1 = Calibration OK */ + cal_ok = arg; + case 14: + ts_clear(); + break; + case 15: + x_rev = arg; + break; + case 16: + y_rev = arg; + break; + case 17: + print_par(); + break; + } + return 0; +} + +static int m32700ut_ts_open(struct inode* inode, struct file* filp) +{ + if (!ts_open_count++) + start_wait_for_action(); + + ts_clear(); + + return 0; +} + +static int m32700ut_ts_release(struct inode* inode, struct file* filp) +{ + if (!--ts_open_count) + stop_wait_for_action(); + + ts_clear(); + + m32700ut_ts_fasync(-1, filp, 0); + + return 0; +} + +static irqreturn_t m32700ut_ts_interrupt(int irq, void *ptr, struct pt_regs *regs) +{ + unsigned char rtkisr; + unsigned char tplsr; + +DPRINTK("m32700ut_ts_interrupt: "); + ts_in(&rtkisr, 1, MCU_RTKISR); +#ifdef TS_DEBUG +printk("0x%08x\n",rtkisr); +#endif + if (!(rtkisr & RTKISR_TPIF)) + return IRQ_NONE; + //rtkisr &= ~RTKISR_TPIF; + + ts_in(&tplsr, 1, MCU_TPLSR); + /* FIXME: + * clear an unknown spec bit in order to avoid iteration + * of interrupt caused by unknown bit. + */ + tplsr &= ~0x08; + if (tplsr & TPLSR_PEN_ONIF) { /* PEN_ON */ + tplsr &= ~TPLSR_PEN_ONIF; + cur_data.pressure = 1000; + ts_state = 1; + DPRINTK("Pen ON : "); + } + else if (tplsr & TPLSR_PEN_OFFIF) { /* PEN_OFF */ + tplsr &= ~TPLSR_PEN_OFFIF; + cur_data.pressure = 0; + ts_state = 0; + DPRINTK("Pen OFF: "); + } + else { + printk("Pen ???: %02x\n", tplsr); + tplsr &= ~(TPLSR_PEN_ONIF | TPLSR_PEN_OFFIF); + goto update_status; + } + + ts_in((unsigned char *)&cur_data.x, 2, MCU_XPAR); + ts_in((unsigned char *)&cur_data.y, 2, MCU_YPAR); + cur_data.x = be16_to_cpu(cur_data.x); + cur_data.y = be16_to_cpu(cur_data.y); +#ifdef TS_DEBUG + printk("(0x%04x,0x%04x)\n", + (unsigned short)cur_data.x, (unsigned short)cur_data.y); +#endif + + cur_data.millisecs = (short)jiffies; + + new_data(); + +update_status: + ts_out(&tplsr, 1, MCU_TPLSR); + if (tplsr == 0) + rtkisr &= ~RTKISR_TPIF; + ts_out(&rtkisr, 1, MCU_RTKISR); + + return IRQ_HANDLED; +} + +static struct file_operations m32700ut_ts_fops = { + owner: THIS_MODULE, + read: m32700ut_ts_read, + poll: m32700ut_ts_poll, + ioctl: m32700ut_ts_ioctl, + fasync: m32700ut_ts_fasync, + open: m32700ut_ts_open, + release: m32700ut_ts_release, +}; + +#ifdef CONFIG_PM +static int m32700ut_ts_pm_callback(struct pm_dev* pm_dev, + pm_request_t req, void* data) +{ + switch (req) { + case PM_SUSPEND: + break; + case PM_RESUME: + head = tail = 0; + break; + } + return 0; +} +#endif + +int __init m32700ut_ts_init(void) +{ + int rc; + + wait_for_action(); + + rc = register_chrdev(TS_MAJOR, TS_NAME, &m32700ut_ts_fops); + if (rc < 0) { + printk(KERN_ERR "m32700ut_ts: failed to register char dev.\n"); + return rc; + } + +#if 0 + devfs_register(NULL, TS_NAME, DEVFS_FL_NONE, TS_MAJOR, 0, + 0444 | S_IFCHR, &m32700ut_ts_fops, NULL); +#endif + devfs_mk_cdev(MKDEV(TS_MAJOR,0), S_IFCHR | S_IRUSR | S_IRGRP | S_IROTH, TS_NAME); + if ((rc = request_irq(M32700UT_LCD_IRQ_BAT_INT, m32700ut_ts_interrupt, + SA_SHIRQ, TS_NAME, m32700ut_ts_interrupt))) { + printk(KERN_ERR "m32700ut_ts: failed to register BAT_INT.\n"); + return rc; + } + + raw_max_x = 4000; + raw_max_y = 4000; + raw_min_x = 200; + raw_min_y = 200; + + res_x = 240; + res_y = 320; + + head = 0; + tail = 0; + xyswap = 0; + + cal_ok = 0; + x_rev = 0; + y_rev = 0; +#if 1 + /* default setting (should be fixed by calibration utility) */ + raw_max_x = 0x076e; + raw_max_y = 0x0748; + raw_min_x = 0x00b2; + raw_min_y = 0x0074; + cal_ok = 1; + x_rev = 1; + y_rev = 1; +#endif + + ts_clear(); + + init_waitqueue_head(&queue); + +#ifdef CONFIG_PM + m32700ut_ts_pm_dev = pm_register(PM_SYS_DEV, 0, + m32700ut_ts_pm_callback); +#endif + // wait_for_action(); + + printk(KERN_INFO "M32700UT tocuh screen driver initialized.\n"); + return 0; +} + +#ifdef MODULE +void __exit m32700ut_ts_cleanup(void) +{ +#ifdef CONFIG_PM + pm_unregister_all(m32700ut_ts_pm_callback); +#endif + free_irq(M32700UT_LCD_IRQ_BAT_INT, m32700ut_ts_interrupt); + //stop_wait_for_action(); + unregister_chrdev(TS_MAJOR, TS_NAME); + + printk(KERN_INFO "M32700UT touch screen driver removed.\n"); +} +#endif + +module_init(m32700ut_ts_init); +#ifdef MODULE +module_exit(m32700ut_ts_cleanup); +#endif + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Takeo Takahashi "); +MODULE_DESCRIPTION("Touch screen driver for M32700UT"); diff -uNpr linux-2.6.14.6/drivers/mtd/maps/Kconfig linux-2.6.14.6-20060127/drivers/mtd/maps/Kconfig --- linux-2.6.14.6/drivers/mtd/maps/Kconfig 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/drivers/mtd/maps/Kconfig 2006-01-27 19:00:32.356430265 +0900 @@ -608,6 +608,15 @@ config MTD_BAST_MAXSIZE depends on MTD_BAST default "4" +config MTD_M32R + bool "Flash device mapped on M32R" + depends on M32R && (PLAT_USRV || PLAT_M32700UT) + select MTD_PARTITIONS + select MTD_MAP_BANK_WIDTH_2 + select MTD_CFI_I1 + select MTD_CFI_AMDSTD + select MTD_CFI_BE_BYTE_SWAP + config MTD_SHARP_SL bool "ROM maped on Sharp SL Series" depends on MTD && ARCH_PXA diff -uNpr linux-2.6.14.6/drivers/mtd/maps/Makefile linux-2.6.14.6-20060127/drivers/mtd/maps/Makefile --- linux-2.6.14.6/drivers/mtd/maps/Makefile 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/drivers/mtd/maps/Makefile 2006-01-27 19:00:32.363429160 +0900 @@ -67,6 +67,7 @@ obj-$(CONFIG_MTD_IXP4XX) += ixp4xx.o obj-$(CONFIG_MTD_IXP2000) += ixp2000.o obj-$(CONFIG_MTD_WRSBC8260) += wr_sbc82xx_flash.o obj-$(CONFIG_MTD_DMV182) += dmv182.o +obj-$(CONFIG_MTD_M32R) += m32r-flash.o obj-$(CONFIG_MTD_SHARP_SL) += sharpsl-flash.o obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o diff -uNpr linux-2.6.14.6/drivers/mtd/maps/m32r-flash.c linux-2.6.14.6-20060127/drivers/mtd/maps/m32r-flash.c --- linux-2.6.14.6/drivers/mtd/maps/m32r-flash.c 1970-01-01 09:00:00.000000000 +0900 +++ linux-2.6.14.6-20060127/drivers/mtd/maps/m32r-flash.c 2006-01-27 19:00:32.383426001 +0900 @@ -0,0 +1,246 @@ +/* + * Flash memory access on M32R based devices + * + * Copyright (C) 2003 Takeo Takahashi, Hitoshi Yamamoto + * Takeshi Aoki + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + */ + +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include + +#define WINDOW_ADDR (0x00000000) /* start of flash memory */ + +static struct map_info m32r_map = { + .name = "M32R flash", + .bankwidth = 2, + .phys = WINDOW_ADDR, +}; + +static int flash_write = 0; + +static int __init flash_write_setup(char *str) +{ + flash_write = 1; + printk("Flash ROM write enabled\n"); + return 1; +} + +__setup("flash_write", flash_write_setup); + +#if defined(CONFIG_PLAT_M32700UT) +#define M32700UT_FLASH_SIZE 0x00800000 +static struct mtd_partition m32700ut_partitions[] = { + { + .name = "M32700UT boot firmware", + .size = 0x30000, /* 192KB */ + .offset = 0, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, { + .name = "M32700UT kernel", + .size = 0xd0000, /* 832KB */ + .offset = MTDPART_OFS_APPEND, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, { + .name = "M32700UT root", + .size = 0x6f0000, /* 7104KB */ + .offset = MTDPART_OFS_APPEND, + }, { + .name = "M32700UT params", + .size = MTDPART_SIZ_FULL, /* 64KB */ + .offset = MTDPART_OFS_APPEND, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + } +}; +#elif defined(CONFIG_PLAT_MAPPI2) +#define M32700UT_FLASH_SIZE 0x00400000 +static struct mtd_partition m32700ut_partitions[] = { + { + .name = "M3A-ZA36 boot firmware", + .size = 0x30000, /* 192KB */ + .offset = 0, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, { + .name = "M3A-ZA36 kernel", + .size = 0xd0000, /* 832KB */ + .offset = MTDPART_OFS_APPEND, + }, { + .name = "M3A-ZA36 root", + .size = 0x2f0000, /* 3008KB */ + .offset = MTDPART_OFS_APPEND, + }, { + .name = "M3A-ZA36 params", + .size = MTDPART_SIZ_FULL, /* 64KB */ + .offset = MTDPART_OFS_APPEND, + } +}; +#elif defined(CONFIG_PLAT_USRV) +#define USRV_FLASH_SIZE 0x00800000 +/* + * chip : MBM29DL640E (Fujitsu) + * phys addr : 0x00000000 + * size : 0x00800000 (8MB) + * 0x00000000 - 0x0000ffff : 8KB sector : 64KB + * 0x00010000 - 0x007effff : 64KB sector : 8064KB + * 0x007f0000 - 0x007fffff : 8KB sector : 64KB + */ + +static struct mtd_partition usrv_partitions[] = { + { + .name = "Boot loader", + .size = 0xe000, /* 56KB */ + .offset = 0, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, { + .name = "Kernel parameter", + .size = 0x2000, /* 8KB */ + .offset = MTDPART_OFS_APPEND, + }, { + .name = "Kernel", + .size = 0x200000, /* 2MB */ + .offset = MTDPART_OFS_APPEND, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, { + .name = "INITRD", + .size = 0xe0000, /* 896KB */ + .offset = MTDPART_OFS_APPEND, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, { + .name = "User FS", + .size = 0x500000, /* 5MB */ + .offset = MTDPART_OFS_APPEND, + }, { + .name = "User parameter", + .size = 0x10000, /* 64KB */ + .offset = MTDPART_OFS_APPEND, + } +}; +#else +#error no platform configuration +#endif + +#ifdef CONFIG_MTD_PARTITIONS +static struct mtd_partition *parsed_parts; +const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL }; +#endif /* CONFIG_MTD_PARTITIONS */ +static struct mtd_info *mymtd; + +static int __init m32r_mtd_init(void) +{ + struct mtd_partition *parts; + int nb_parts = 0; + int parsed_nr_parts = 0; + const char *part_type; + + /* + * Static partition definition selection + */ + part_type = "static"; + +#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_MAPPI2) + parts = m32700ut_partitions; + nb_parts = ARRAY_SIZE(m32700ut_partitions); + m32r_map.size = M32700UT_FLASH_SIZE; + m32r_map.bankwidth = 2; +#elif defined(CONFIG_PLAT_USRV) + parts = usrv_partitions; + nb_parts = ARRAY_SIZE(usrv_partitions); + m32r_map.size = USRV_FLASH_SIZE; + m32r_map.bankwidth = 2; + { + int i; + + if (flash_write) + for (i = 0 ; i < nb_parts ; i++) + parts[i].mask_flags = 0; + } +#endif + + m32r_map.virt = (void __iomem *)ioremap(WINDOW_ADDR, m32r_map.size); + if (!m32r_map.virt) { + printk("M32R flash: Failed to ioremap\n"); + return -EIO; + } + + simple_map_init(&m32r_map); + + /* + * Now let's probe for the actual flash. Do it here since + * specific machine settings might have been set above. + */ + printk(KERN_NOTICE "M32R flash: probing %d-bit flash bus\n", + m32r_map.bankwidth * 8); + +#ifdef CONFIG_MTD_M5 + mymtd = do_map_probe("m5drv", &m32r_map); +#elif CONFIG_MTD_CFI + mymtd = do_map_probe("cfi_probe", &m32r_map); +#else + mymtd = NULL; +#endif + if (!mymtd) { + iounmap((void *)m32r_map.virt); + return -ENXIO; + } + + mymtd->owner = THIS_MODULE; + + /* + * Dynamic partition selection stuff (might override the static ones) + */ +#ifdef CONFIG_MTD_PARTITIONS + parsed_nr_parts = parse_mtd_partitions(mymtd, part_probes, + &parsed_parts, 0); + if (parsed_nr_parts > 0) { + part_type = "dynamic"; + parts = parsed_parts; + nb_parts = parsed_nr_parts; + } +#endif /* CONFIG_MTD_PARTITIONS */ + + if (nb_parts == 0) { + printk(KERN_NOTICE "M32R flash: no partition info available," \ + " registering whole flash at once\n"); + add_mtd_device(mymtd); + } else { + printk(KERN_NOTICE "Using %s partition definition\n", + part_type); + add_mtd_partitions(mymtd, parts, nb_parts); + } + + return 0; +} + +static void __exit m32r_mtd_cleanup(void) +{ + if (mymtd) { + del_mtd_partitions(mymtd); + map_destroy(mymtd); + } + if (m32r_map.virt) { + iounmap((void *)m32r_map.virt); + m32r_map.virt = NULL; + } +} + +module_init(m32r_mtd_init); +module_exit(m32r_mtd_cleanup); + +MODULE_AUTHOR("Takeo Takahashi"); +MODULE_DESCRIPTION("M32R Flash map driver"); +MODULE_LICENSE("GPL"); diff -uNpr linux-2.6.14.6/drivers/mtd/redboot.c linux-2.6.14.6-20060127/drivers/mtd/redboot.c --- linux-2.6.14.6/drivers/mtd/redboot.c 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/drivers/mtd/redboot.c 2006-01-27 19:00:32.433418104 +0900 @@ -53,7 +53,7 @@ static int parse_redboot_partitions(stru char *nullname; int namelen = 0; int nulllen = 0; - int numslots; + int numslots = 0, maxslots; unsigned long offset; #ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED static char nullstring[] = "unallocated"; @@ -83,16 +83,16 @@ static int parse_redboot_partitions(stru goto out; } - numslots = (master->erasesize / sizeof(struct fis_image_desc)); - for (i = 0; i < numslots; i++) { + maxslots = (master->erasesize / sizeof(struct fis_image_desc)); + for (i = 0; i < maxslots; i++) { if (buf[i].name[0] == 0xff) { - i = numslots; + numslots = i; break; } if (!memcmp(buf[i].name, "FIS directory", 14)) break; } - if (i == numslots) { + if (i == maxslots) { /* Didn't find it */ printk(KERN_NOTICE "No RedBoot partition table detected in %s\n", master->name); diff -uNpr linux-2.6.14.6/drivers/net/smc91x.h linux-2.6.14.6-20060127/drivers/net/smc91x.h --- linux-2.6.14.6/drivers/net/smc91x.h 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/drivers/net/smc91x.h 2006-01-27 19:00:32.494408470 +0900 @@ -230,12 +230,12 @@ SMC_outw(u16 val, void __iomem *ioaddr, #define SMC_CAN_USE_16BIT 1 #define SMC_CAN_USE_32BIT 0 -#define SMC_inb(a, r) inb((a) + (r) - 0xa0000000) -#define SMC_inw(a, r) inw((a) + (r) - 0xa0000000) -#define SMC_outb(v, a, r) outb(v, (a) + (r) - 0xa0000000) -#define SMC_outw(v, a, r) outw(v, (a) + (r) - 0xa0000000) -#define SMC_insw(a, r, p, l) insw((a) + (r) - 0xa0000000, p, l) -#define SMC_outsw(a, r, p, l) outsw((a) + (r) - 0xa0000000, p, l) +#define SMC_inb(a, r) inb((u32)a) + (r)) +#define SMC_inw(a, r) inw(((u32)a) + (r)) +#define SMC_outb(v, a, r) outb(v, ((u32)a) + (r)) +#define SMC_outw(v, a, r) outw(v, ((u32)a) + (r)) +#define SMC_insw(a, r, p, l) insw(((u32)a) + (r), p, l) +#define SMC_outsw(a, r, p, l) outsw(((u32)a) + (r), p, l) #define set_irq_type(irq, type) do {} while(0) diff -uNpr linux-2.6.14.6/drivers/net/wireless/hermes.h linux-2.6.14.6-20060127/drivers/net/wireless/hermes.h --- linux-2.6.14.6/drivers/net/wireless/hermes.h 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/drivers/net/wireless/hermes.h 2006-01-27 19:00:32.525403574 +0900 @@ -359,10 +359,22 @@ typedef struct hermes { } hermes_t; /* Register access convenience macros */ +#if defined(__m32r__) +#define hermes_read_reg(hw, off) ((hw)->io_space ? \ + le16_to_cpu(inw((hw)->iobase + ( (off) << (hw)->reg_spacing ))) : \ + readw((hw)->iobase + ( (off) << (hw)->reg_spacing ))) +#define hermes_write_reg(hw, off, val) do { \ + if ((hw)->io_space) \ + outw_p(cpu_to_le16((val)), (hw)->iobase + ((off) << (hw)->reg_spacing)); \ + else \ + writew((val), (hw)->iobase + ((off) << (hw)->reg_spacing)); \ + } while (0) +#else /* !__m32r__ */ #define hermes_read_reg(hw, off) \ (ioread16((hw)->iobase + ( (off) << (hw)->reg_spacing ))) #define hermes_write_reg(hw, off, val) \ (iowrite16((val), (hw)->iobase + ((off) << (hw)->reg_spacing))) +#endif /* !__m32r__ */ #define hermes_read_regn(hw, name) hermes_read_reg((hw), HERMES_##name) #define hermes_write_regn(hw, name, val) hermes_write_reg((hw), HERMES_##name, (val)) diff -uNpr linux-2.6.14.6/include/asm-m32r/assembler.h linux-2.6.14.6-20060127/include/asm-m32r/assembler.h --- linux-2.6.14.6/include/asm-m32r/assembler.h 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/include/asm-m32r/assembler.h 2006-01-27 19:29:49.957890753 +0900 @@ -52,7 +52,7 @@ or3 \reg, \reg, #low(\x) .endm -#if !defined(CONFIG_CHIP_M32102) +#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104)) #define STI(reg) STI_M reg .macro STI_M reg setpsw #0x40 -> nop @@ -64,7 +64,7 @@ clrpsw #0x40 -> nop ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1). .endm -#else /* CONFIG_CHIP_M32102 */ +#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */ #define STI(reg) STI_M reg .macro STI_M reg mvfc \reg, psw @@ -109,6 +109,9 @@ push r13 mvfachi r13 push r13 + ldi r13, #0 + push r13 ; dummy push acc1h + push r13 ; dummy push acc1l #else #error unknown isa configuration #endif @@ -156,6 +159,8 @@ pop r13 mvtaclo r13, a1 #elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) + pop r13 ; dummy pop acc1h + pop r13 ; dummy pop acc1l pop r13 mvtachi r13 pop r13 @@ -191,12 +196,12 @@ and \reg, sp .endm -#if !defined(CONFIG_CHIP_M32102) +#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104)) .macro SWITCH_TO_KERNEL_STACK ; switch to kernel stack (spi) clrpsw #0x80 -> nop .endm -#else /* CONFIG_CHIP_M32102 */ +#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */ .macro SWITCH_TO_KERNEL_STACK push r0 ; save r0 for working mvfc r0, psw @@ -218,7 +223,7 @@ .fillinsn 2: .endm -#endif /* CONFIG_CHIP_M32102 */ +#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */ #endif /* __ASSEMBLY__ */ diff -uNpr linux-2.6.14.6/include/asm-m32r/cacheflush.h linux-2.6.14.6-20060127/include/asm-m32r/cacheflush.h --- linux-2.6.14.6/include/asm-m32r/cacheflush.h 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/include/asm-m32r/cacheflush.h 2006-01-27 19:00:32.582394572 +0900 @@ -7,7 +7,7 @@ extern void _flush_cache_all(void); extern void _flush_cache_copyback_all(void); -#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) +#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) diff -uNpr linux-2.6.14.6/include/asm-m32r/ide.h linux-2.6.14.6-20060127/include/asm-m32r/ide.h --- linux-2.6.14.6/include/asm-m32r/ide.h 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/include/asm-m32r/ide.h 2006-01-27 19:00:32.603391256 +0900 @@ -1,8 +1,6 @@ #ifndef _ASM_M32R_IDE_H #define _ASM_M32R_IDE_H -/* $Id$ */ - /* * linux/include/asm-m32r/ide.h * @@ -30,6 +28,11 @@ #include #endif +#if defined(CONFIG_PLAT_MAPPI2) +#include +#include +#endif + #define IDE_ARCH_OBSOLETE_DEFAULTS static __inline__ int ide_default_irq(unsigned long base) diff -uNpr linux-2.6.14.6/include/asm-m32r/irq.h linux-2.6.14.6-20060127/include/asm-m32r/irq.h --- linux-2.6.14.6/include/asm-m32r/irq.h 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/include/asm-m32r/irq.h 2006-01-27 19:00:32.624387939 +0900 @@ -65,6 +65,22 @@ #define NR_IRQS \ (OPSPUT_NUM_CPU_IRQ + OPSPUT_NUM_PLD_IRQ \ + OPSPUT_NUM_LCD_PLD_IRQ + OPSPUT_NUM_LAN_PLD_IRQ) + +#elif defined(CONFIG_PLAT_M32104UT) +/* + * IRQ definitions for M32104UT + * M32104 Chip: 64 interrupts + * ICU of M32104UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin + */ +#define M32104UT_NUM_CPU_IRQ (64) +#define M32104UT_NUM_PLD_IRQ (32) +#define M32104UT_IRQ_BASE 0 +#define M32104UT_CPU_IRQ_BASE M32104UT_IRQ_BASE +#define M32104UT_PLD_IRQ_BASE (M32104UT_CPU_IRQ_BASE + M32104UT_NUM_CPU_IRQ) + +#define NR_IRQS \ + (M32104UT_NUM_CPU_IRQ + M32104UT_NUM_PLD_IRQ) + #else #define NR_IRQS 64 #endif diff -uNpr linux-2.6.14.6/include/asm-m32r/m32102.h linux-2.6.14.6-20060127/include/asm-m32r/m32102.h --- linux-2.6.14.6/include/asm-m32r/m32102.h 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/include/asm-m32r/m32102.h 2006-01-27 19:00:32.648384149 +0900 @@ -11,7 +11,11 @@ /*======================================================================* * Special Function Register *======================================================================*/ +#if !defined(CONFIG_CHIP_M32104) #define M32R_SFR_OFFSET (0x00E00000) /* 0x00E00000-0x00EFFFFF 1[MB] */ +#else +#define M32R_SFR_OFFSET (0x00700000) /* 0x00700000-0x007FFFFF 1[MB] */ +#endif /* * Clock and Power Management registers. @@ -100,7 +104,7 @@ #define M32R_MFT5RLD_PORTL (0x0C+M32R_MFT5_OFFSET) /* MFT4 reload */ #define M32R_MFT5CMPRLD_PORTL (0x10+M32R_MFT5_OFFSET) /* MFT4 compare reload */ -#ifdef CONFIG_CHIP_M32700 +#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32104) #define M32R_MFTCR_MFT0MSK (1UL<<31) /* b0 */ #define M32R_MFTCR_MFT1MSK (1UL<<30) /* b1 */ #define M32R_MFTCR_MFT2MSK (1UL<<29) /* b2 */ @@ -113,7 +117,7 @@ #define M32R_MFTCR_MFT3EN (1UL<<20) /* b11 */ #define M32R_MFTCR_MFT4EN (1UL<<19) /* b12 */ #define M32R_MFTCR_MFT5EN (1UL<<18) /* b13 */ -#else /* not CONFIG_CHIP_M32700 */ +#else /* not CONFIG_CHIP_M32700 && not CONFIG_CHIP_M32104 */ #define M32R_MFTCR_MFT0MSK (1UL<<15) /* b16 */ #define M32R_MFTCR_MFT1MSK (1UL<<14) /* b17 */ #define M32R_MFTCR_MFT2MSK (1UL<<13) /* b18 */ @@ -126,7 +130,7 @@ #define M32R_MFTCR_MFT3EN (1UL<<4) /* b27 */ #define M32R_MFTCR_MFT4EN (1UL<<3) /* b28 */ #define M32R_MFTCR_MFT5EN (1UL<<2) /* b29 */ -#endif /* not CONFIG_CHIP_M32700 */ +#endif /* not CONFIG_CHIP_M32700 && not CONFIG_CHIP_M32104 */ #define M32R_MFTMOD_CC_MASK (1UL<<15) /* b16 */ #define M32R_MFTMOD_TCCR (1UL<<13) /* b18 */ @@ -241,8 +245,24 @@ #define M32R_IRQ_MFT1 (17) /* MFT1 */ #define M32R_IRQ_MFT2 (18) /* MFT2 */ #define M32R_IRQ_MFT3 (19) /* MFT3 */ -#define M32R_IRQ_MFT4 (20) /* MFT4 */ -#define M32R_IRQ_MFT5 (21) /* MFT5 */ +#ifdef CONFIG_CHIP_M32104 +#define M32R_IRQ_MFTX0 (24) /* MFTX0 */ +#define M32R_IRQ_MFTX1 (25) /* MFTX1 */ +#define M32R_IRQ_DMA0 (32) /* DMA0 */ +#define M32R_IRQ_DMA1 (33) /* DMA1 */ +#define M32R_IRQ_DMA2 (34) /* DMA2 */ +#define M32R_IRQ_DMA3 (35) /* DMA3 */ +#define M32R_IRQ_SIO0_R (40) /* SIO0 send */ +#define M32R_IRQ_SIO0_S (41) /* SIO0 receive */ +#define M32R_IRQ_SIO1_R (42) /* SIO1 send */ +#define M32R_IRQ_SIO1_S (43) /* SIO1 receive */ +#define M32R_IRQ_SIO2_R (44) /* SIO2 send */ +#define M32R_IRQ_SIO2_S (45) /* SIO2 receive */ +#define M32R_IRQ_SIO3_R (46) /* SIO3 send */ +#define M32R_IRQ_SIO3_S (47) /* SIO3 receive */ +#define M32R_IRQ_ADC (56) /* ADC */ +#define M32R_IRQ_PC (57) /* PC */ +#else /* ! M32104 */ #define M32R_IRQ_DMA0 (32) /* DMA0 */ #define M32R_IRQ_DMA1 (33) /* DMA1 */ #define M32R_IRQ_SIO0_R (48) /* SIO0 send */ @@ -255,6 +275,7 @@ #define M32R_IRQ_SIO3_S (55) /* SIO3 receive */ #define M32R_IRQ_SIO4_R (56) /* SIO4 send */ #define M32R_IRQ_SIO4_S (57) /* SIO4 receive */ +#endif /* ! M32104 */ #ifdef CONFIG_SMP #define M32R_IRQ_IPI0 (56) @@ -281,15 +302,12 @@ #define M32R_FPGA_VERSION0_PORTL (0x30+M32R_FPGA_TOP) #define M32R_FPGA_VERSION1_PORTL (0x34+M32R_FPGA_TOP) +#endif /* CONFIG_SMP */ + #ifndef __ASSEMBLY__ -/* For NETDEV WATCHDOG */ typedef struct { unsigned long icucr; /* ICU Control Register */ } icu_data_t; - -extern icu_data_t icu_data[]; #endif -#endif /* CONFIG_SMP */ - #endif /* _M32102_H_ */ diff -uNpr linux-2.6.14.6/include/asm-m32r/m32104ut/m32104ut_pld.h linux-2.6.14.6-20060127/include/asm-m32r/m32104ut/m32104ut_pld.h --- linux-2.6.14.6/include/asm-m32r/m32104ut/m32104ut_pld.h 1970-01-01 09:00:00.000000000 +0900 +++ linux-2.6.14.6-20060127/include/asm-m32r/m32104ut/m32104ut_pld.h 2006-01-27 19:00:32.683378621 +0900 @@ -0,0 +1,165 @@ +/* + * include/asm/m32104ut/m32104ut_pld.h + * + * Definitions for Programable Logic Device(PLD) on M32104UT board. + * Based on m32700ut_pld.h + * + * Copyright (c) 2002 Takeo Takahashi + * Copyright (c) 2005 Naoto Sugai + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file "COPYING" in the main directory of + * this archive for more details. + * + * $Id: m32104ut_pld.h,v 1.1 2005-11-28 05:00:11 fujiwara Exp $ + */ + +#ifndef _M32104UT_M32104UT_PLD_H +#define _M32104UT_M32104UT_PLD_H + +#include + +#if defined(CONFIG_PLAT_M32104UT) +#define PLD_PLAT_BASE 0x02c00000 +#else +#error "no platform configuration" +#endif + +#ifndef __ASSEMBLY__ +/* + * C functions use non-cache address. + */ +#define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */) +#define __reg8 (volatile unsigned char *) +#define __reg16 (volatile unsigned short *) +#define __reg32 (volatile unsigned int *) +#else +#define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET) +#define __reg8 +#define __reg16 +#define __reg32 +#endif /* __ASSEMBLY__ */ + +/* CFC */ +#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000) +#define PLD_CFSTS __reg16(PLD_BASE + 0x0002) +#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004) +#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) + +/* MMC */ +#define PLD_MMCCR __reg16(PLD_BASE + 0x4000) +#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002) +#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006) +#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a) +#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c) +#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e) +#define PLD_MMCDET __reg16(PLD_BASE + 0x4010) +#define PLD_MMCWP __reg16(PLD_BASE + 0x4012) +#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000) +#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000) +#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000) +#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006) + +/* ICU + * ICUISTS: status register + * ICUIREQ0: request register + * ICUIREQ1: request register + * ICUCR3: control register for CFIREQ# interrupt + * ICUCR4: control register for CFC Card insert interrupt + * ICUCR5: control register for CFC Card eject interrupt + * ICUCR6: control register for external interrupt + * ICUCR11: control register for MMC Card insert/eject interrupt + * ICUCR13: control register for SC error interrupt + * ICUCR14: control register for SC receive interrupt + * ICUCR15: control register for SC send interrupt + */ + +#define PLD_IRQ_INT0 (M32104UT_PLD_IRQ_BASE + 0) /* None */ +#define PLD_IRQ_CFIREQ (M32104UT_PLD_IRQ_BASE + 3) /* CF IREQ */ +#define PLD_IRQ_CFC_INSERT (M32104UT_PLD_IRQ_BASE + 4) /* CF Insert */ +#define PLD_IRQ_CFC_EJECT (M32104UT_PLD_IRQ_BASE + 5) /* CF Eject */ +#define PLD_IRQ_EXINT (M32104UT_PLD_IRQ_BASE + 6) /* EXINT */ +#define PLD_IRQ_MMCCARD (M32104UT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */ +#define PLD_IRQ_SC_ERROR (M32104UT_PLD_IRQ_BASE + 13) /* SC error */ +#define PLD_IRQ_SC_RCV (M32104UT_PLD_IRQ_BASE + 14) /* SC receive */ +#define PLD_IRQ_SC_SND (M32104UT_PLD_IRQ_BASE + 15) /* SC send */ + +#define PLD_ICUISTS __reg16(PLD_BASE + 0x8002) +#define PLD_ICUISTS_VECB_MASK (0xf000) +#define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK) +#define PLD_ICUISTS_ISN_MASK (0x07c0) +#define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK) +#define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104) +#define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106) +#define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108) +#define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a) +#define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114) +#define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118) +#define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a) +#define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c) +#define PLD_ICUCR_IEN (0x1000) +#define PLD_ICUCR_IREQ (0x0100) +#define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */ +#define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */ +#define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */ +#define PLD_ICUCR_ISMOD03 (0x0030) /* High level */ +#define PLD_ICUCR_ILEVEL0 (0x0000) +#define PLD_ICUCR_ILEVEL1 (0x0001) +#define PLD_ICUCR_ILEVEL2 (0x0002) +#define PLD_ICUCR_ILEVEL3 (0x0003) +#define PLD_ICUCR_ILEVEL4 (0x0004) +#define PLD_ICUCR_ILEVEL5 (0x0005) +#define PLD_ICUCR_ILEVEL6 (0x0006) +#define PLD_ICUCR_ILEVEL7 (0x0007) + +/* Power Control of MMC and CF */ +#define PLD_CPCR __reg16(PLD_BASE + 0x14000) +#define PLD_CPCR_CDP 0x0001 + +/* LED Control + * + * 1: DIP swich side + * 2: Reset switch side + */ +#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002) +#define PLD_IOLED_1_ON 0x001 +#define PLD_IOLED_1_OFF 0x000 +#define PLD_IOLED_2_ON 0x002 +#define PLD_IOLED_2_OFF 0x000 + +/* DIP Switch + * 0: Write-protect of Flash Memory (0:protected, 1:non-protected) + * 1: - + * 2: - + * 3: - + */ +#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004) +#define PLD_IOSWSTS_IOSW2 0x0200 +#define PLD_IOSWSTS_IOSW1 0x0100 +#define PLD_IOSWSTS_IOWP0 0x0001 + +/* CRC */ +#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000) +#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002) +#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004) +#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006) +#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008) +#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a) + +/* RTC */ +#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000) +#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002) +#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004) +#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006) +#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008) + +/* SIM Card */ +#define PLD_SCCR __reg16(PLD_BASE + 0x38000) +#define PLD_SCMOD __reg16(PLD_BASE + 0x38004) +#define PLD_SCSTS __reg16(PLD_BASE + 0x38006) +#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008) +#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a) +#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c) +#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e) + +#endif /* _M32104UT_M32104UT_PLD_H */ diff -uNpr linux-2.6.14.6/include/asm-m32r/m32700ut/m32700ut_lcd.h linux-2.6.14.6-20060127/include/asm-m32r/m32700ut/m32700ut_lcd.h --- linux-2.6.14.6/include/asm-m32r/m32700ut/m32700ut_lcd.h 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/include/asm-m32r/m32700ut/m32700ut_lcd.h 2006-01-27 19:00:32.689377674 +0900 @@ -3,13 +3,12 @@ * * M32700UT-LCD board * - * Copyright (c) 2002 Takeo Takahashi + * Copyright (c) 2002-2005 Takeo Takahashi, Hayato Fujiwara * * This file is subject to the terms and conditions of the GNU General * Public License. See the file "COPYING" in the main directory of * this archive for more details. * - * $Id$ */ #ifndef _M32700UT_M32700UT_LCD_H @@ -56,4 +55,117 @@ #define M32700UT_LCD_ICUCR19 __reg16(M32700UT_LCD_BASE + 0x300036) #define M32700UT_LCD_ICUCR21 __reg16(M32700UT_LCD_BASE + 0x30003a) +/* + * BATC + */ +#define BATSIOCR (M32700UT_LCD_BASE + 0x00300800) +#define BATSIOCR_TXEN (1<<0) +#define BATSIOCR_RXEN (1<<1) +#define BATSIOMOD (M32700UT_LCD_BASE + 0x00300802) +#define BATSIOMOD_CTSS (1<<6) +#define BATSIOSTS (M32700UT_LCD_BASE + 0x00300806) +#define BATSIOSTS_TEMP (1<<0) +#define BATSIOSTS_TXCP (1<<1) +#define BATSIOSTS_RXCP (1<<2) +#define BATSIOSTS_TXSC (1<<8) +#define BATSIOSTS_RXSC (1<<9) +#define BATSIOINTCR (M32700UT_LCD_BASE + 0x00300808) +#define BATSIOINTCR_TXIEN (1<<1) +#define BATSIOINTCR_RXIEN (1<<2) +#define BATSIOBAUR (M32700UT_LCD_BASE + 0x0030080a) +#define BATSIOTXB (M32700UT_LCD_BASE + 0x0030080c) +#define BATSIORXB (M32700UT_LCD_BASE + 0x0030080e) + +/* + * USBC + */ +#define USBCR (M32700UT_LCD_BASE + 0x00301000) +#define USBCR_OTGS 0x0100 +#define USBCR_HSWS 0x0002 +#define USBCR_DSWS 0x0001 + +/* + * AUDC + */ +#define AUDXTICR (M32700UT_LCD_BASE + 0x00301800) +#define AUDPDCR (M32700UT_LCD_BASE + 0x00301802) +#define AUDMSCR (M32700UT_LCD_BASE + 0x00301804) +#define AUDTCR (M32700UT_LCD_BASE + 0x00301808) +#define AUDT0CUT (M32700UT_LCD_BASE + 0x00301814) +#define AUDT2CUT (M32700UT_LCD_BASE + 0x00301824) +#define ASNDSIOCR (M32700UT_LCD_BASE + 0x00301830) +#define ASNDSIOSTS (M32700UT_LCD_BASE + 0x00301836) +#define ASNDSIOINTCR (M32700UT_LCD_BASE + 0x00301838) +#define ASNDSIOTXB_L (M32700UT_LCD_BASE + 0x0030183c) +#define ASNDSIOTXB_R (M32700UT_LCD_BASE + 0x0030183e) +#define ASNDSIORXB (M32700UT_LCD_BASE + 0x00301840) +#define ACNLSIOCR (M32700UT_LCD_BASE + 0x00301850) +#define ACNLSIOSTS (M32700UT_LCD_BASE + 0x00301856) +#define ACNLSIOINTCR (M32700UT_LCD_BASE + 0x00301858) +#define ACNLSIOBAUR (M32700UT_LCD_BASE + 0x0030185a) +#define ACNLSIOTXB (M32700UT_LCD_BASE + 0x0030185c) + +/* + * SYSC + */ +#define SYSC (M32700UT_LCD_BASE + 0x00302000) + +/* + * Power Control MCU + */ +#define MCU_CMD_START 0x20 +#define MCU_CMD_ACK 0x06 +#define MCU_CMD_NAK 0x15 + +/* status register */ +#define MCU_RTKISR 0x0090 +#define RTKISR_TPIF (1<<1) +#define RTKISR_KEYIF (1<<2) +#define RTKISR_POWERIF (1<<3) + +/* touch panel */ +#define MCU_TPLCR 0x0020 +#define TPLCR_TP_STR (1<<0) +#define TPLCR_PEN_ONI (1<<1) +#define TPLCR_PEN_OFFI (1<<2) +#define TPLCR_PEN_ONRE (1<<3) +#define MCU_TPLSR 0x0021 +#define TPLSR_PEN_ONIF (1<<1) +#define TPLSR_PEN_OFFIF (1<<2) +#define MCU_TPLSCR 0x0022 +#define TPLSCR_20MS (1<<0) +#define TPLSCR_40MS (1<<1) +#define TPLSCR_60MS (1<<2) +#define TPLSCR_80MS (1<<3) +#define TPLSCR_100MS (1<<4) +#define TPLSCR_120MS (1<<5) +#define TPLSCR_140MS (1<<6) +#define TPLSCR_160MS (1<<7) +#define MCU_XPAR 0x0024 +#define MCU_YPAR 0x0026 + +/* switch */ +#define MCU_KEYCR 0x0060 +#define MCU_KATIMER 0x0061 +#define MCU_KEYSR 0x0062 +#define MCU_KBITPR 0x0064 + +/* power control */ +#define MCU_SPOWCR1 0x0070 +#define MCU_SPOWCR2 0x0071 + +/* LED */ +#define MCU_LEDR 0x00a0 + +/* LCD front light */ +#define LCDR 0x00a1 + +/* DC */ +#define VDCINR 0x0088 + +#ifndef __ASSEMBLY__ +extern void mcu_in(unsigned char *buf, unsigned int len, unsigned short reg); +extern void mcu_out(unsigned char *buf, unsigned int len, unsigned short reg); +#endif /* __ASSEMBLY__ */ + #endif /* _M32700UT_M32700UT_LCD_H */ diff -uNpr linux-2.6.14.6/include/asm-m32r/m32r.h linux-2.6.14.6-20060127/include/asm-m32r/m32r.h --- linux-2.6.14.6/include/asm-m32r/m32r.h 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/include/asm-m32r/m32r.h 2006-01-27 19:00:32.728371514 +0900 @@ -14,7 +14,7 @@ #include #elif defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \ || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \ - || defined(CONFIG_CHIP_OPSP) + || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104) #include #endif @@ -43,6 +43,10 @@ #include #endif +#if defined(CONFIG_PLAT_M32104UT) +#include +#endif /* CONFIG_PLAT_M32104 */ + /* * M32R Register */ @@ -122,7 +126,7 @@ #include #ifdef CONFIG_MMU -#define NONCACHE_OFFSET __PAGE_OFFSET+0x20000000 +#define NONCACHE_OFFSET (__PAGE_OFFSET + 0x20000000) #else #define NONCACHE_OFFSET __PAGE_OFFSET #endif /* CONFIG_MMU */ diff -uNpr linux-2.6.14.6/include/asm-m32r/ptrace.h linux-2.6.14.6-20060127/include/asm-m32r/ptrace.h --- linux-2.6.14.6/include/asm-m32r/ptrace.h 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/include/asm-m32r/ptrace.h 2006-01-27 19:29:49.962889964 +0900 @@ -43,6 +43,14 @@ #define PT_ACC1L 18 #define PT_ACCH PT_ACC0H #define PT_ACCL PT_ACC0L +#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) +#define PT_ACCH 15 +#define PT_ACCL 16 +#define PT_DUMMY_ACC1H 17 +#define PT_DUMMY_ACC1L 18 +#else +#error unknown isa conifiguration +#endif #define PT_PSW 19 #define PT_BPC 20 #define PT_BBPSW 21 @@ -52,21 +60,6 @@ #define PT_LR 25 #define PT_SPI 26 #define PT_ORIGR0 27 -#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) -#define PT_ACCH 15 -#define PT_ACCL 16 -#define PT_PSW 17 -#define PT_BPC 18 -#define PT_BBPSW 19 -#define PT_BBPC 20 -#define PT_SPU 21 -#define PT_FP 22 -#define PT_LR 23 -#define PT_SPI 24 -#define PT_ORIGR0 25 -#else -#error unknown isa conifiguration -#endif /* virtual pt_reg entry for gdb */ #define PT_PC 30 @@ -121,6 +114,8 @@ struct pt_regs { #elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) unsigned long acch; unsigned long accl; + unsigned long dummy_acc1h; + unsigned long dummy_acc1l; #else #error unknown isa configuration #endif diff -uNpr linux-2.6.14.6/include/asm-m32r/sigcontext.h linux-2.6.14.6-20060127/include/asm-m32r/sigcontext.h --- linux-2.6.14.6/include/asm-m32r/sigcontext.h 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/include/asm-m32r/sigcontext.h 2006-01-27 19:29:50.002883653 +0900 @@ -32,6 +32,8 @@ struct sigcontext { #elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) unsigned long sc_acch; unsigned long sc_accl; + unsigned long sc_dummy_acc1h; + unsigned long sc_dummy_acc1l; #else #error unknown isa configuration #endif diff -uNpr linux-2.6.14.6/include/asm-m32r/system.h linux-2.6.14.6-20060127/include/asm-m32r/system.h --- linux-2.6.14.6/include/asm-m32r/system.h 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/include/asm-m32r/system.h 2006-01-27 19:00:32.765365671 +0900 @@ -68,13 +68,13 @@ } while(0) /* Interrupt Control */ -#if !defined(CONFIG_CHIP_M32102) +#if !defined(CONFIG_CHIP_M32102) && !defined(CONFIG_CHIP_M32104) #define local_irq_enable() \ __asm__ __volatile__ ("setpsw #0x40 -> nop": : :"memory") #define local_irq_disable() \ __asm__ __volatile__ ("clrpsw #0x40 -> nop": : :"memory") -#else /* CONFIG_CHIP_M32102 */ -static inline void local_irq_enable(void) +#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */ +static __inline__ void local_irq_enable(void) { unsigned long tmpreg; __asm__ __volatile__( @@ -95,7 +95,7 @@ static inline void local_irq_disable(voi "mvtc %0, psw \n\t" : "=&r" (tmpreg0), "=&r" (tmpreg1) : : "cbit", "memory"); } -#endif /* CONFIG_CHIP_M32102 */ +#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */ #define local_save_flags(x) \ __asm__ __volatile__("mvfc %0,psw" : "=r"(x) : /* no input */) @@ -104,13 +104,13 @@ static inline void local_irq_disable(voi __asm__ __volatile__("mvtc %0,psw" : /* no outputs */ \ : "r" (x) : "cbit", "memory") -#if !defined(CONFIG_CHIP_M32102) +#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104)) #define local_irq_save(x) \ __asm__ __volatile__( \ "mvfc %0, psw; \n\t" \ "clrpsw #0x40 -> nop; \n\t" \ : "=r" (x) : /* no input */ : "memory") -#else /* CONFIG_CHIP_M32102 */ +#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */ #define local_irq_save(x) \ ({ \ unsigned long tmpreg; \ @@ -123,7 +123,7 @@ static inline void local_irq_disable(voi : "=r" (x), "=&r" (tmpreg) \ : : "cbit", "memory"); \ }) -#endif /* CONFIG_CHIP_M32102 */ +#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */ #define irqs_disabled() \ ({ \ diff -uNpr linux-2.6.14.6/include/asm-m32r/thread_info.h linux-2.6.14.6-20060127/include/asm-m32r/thread_info.h --- linux-2.6.14.6/include/asm-m32r/thread_info.h 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/include/asm-m32r/thread_info.h 2006-01-27 19:00:32.790361722 +0900 @@ -95,7 +95,7 @@ static inline struct thread_info *curren } /* thread information allocation */ -#if CONFIG_DEBUG_STACK_USAGE +#ifdef CONFIG_DEBUG_STACK_USAGE #define alloc_thread_info(tsk) \ ({ \ struct thread_info *ret; \ diff -uNpr linux-2.6.14.6/include/asm-m32r/uaccess.h linux-2.6.14.6-20060127/include/asm-m32r/uaccess.h --- linux-2.6.14.6/include/asm-m32r/uaccess.h 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/include/asm-m32r/uaccess.h 2006-01-27 19:00:32.840353826 +0900 @@ -328,7 +328,7 @@ extern void __put_user_bad(void); " .long 1b,4b\n" \ " .long 2b,4b\n" \ ".previous" \ - : "=r"(err) \ + : "=&r"(err) \ : "r"(x), "r"(addr), "i"(-EFAULT), "0"(err) \ : "r14", "memory") @@ -353,7 +353,7 @@ extern void __put_user_bad(void); " .long 1b,4b\n" \ " .long 2b,4b\n" \ ".previous" \ - : "=r"(err) \ + : "=&r"(err) \ : "r"(x), "r"(addr), "i"(-EFAULT), "0"(err) \ : "r14", "memory") #else @@ -398,7 +398,7 @@ struct __large_struct { unsigned long bu " .balign 4\n" \ " .long 1b,3b\n" \ ".previous" \ - : "=r"(err) \ + : "=&r"(err) \ : "r"(x), "r"(addr), "i"(-EFAULT), "0"(err) \ : "r14", "memory") @@ -442,7 +442,7 @@ do { \ " .balign 4\n" \ " .long 1b,3b\n" \ ".previous" \ - : "=r"(err), "=&r"(x) \ + : "=&r"(err), "=&r"(x) \ : "r"(addr), "i"(-EFAULT), "0"(err) \ : "r14", "memory") diff -uNpr linux-2.6.14.6/include/asm-m32r/unistd.h linux-2.6.14.6-20060127/include/asm-m32r/unistd.h --- linux-2.6.14.6/include/asm-m32r/unistd.h 2006-01-08 11:15:24.000000000 +0900 +++ linux-2.6.14.6-20060127/include/asm-m32r/unistd.h 2006-01-27 19:00:32.868349404 +0900 @@ -319,7 +319,7 @@ type name(void) \ register long __scno __asm__ ("r7") = __NR_##name; \ register long __res __asm__("r0"); \ __asm__ __volatile__ (\ - "trap #" SYSCALL_VECTOR \ + "trap #" SYSCALL_VECTOR "|| nop"\ : "=r" (__res) \ : "r" (__scno) \ : "memory"); \ @@ -332,7 +332,7 @@ type name(type1 arg1) \ register long __scno __asm__ ("r7") = __NR_##name; \ register long __res __asm__ ("r0") = (long)(arg1); \ __asm__ __volatile__ (\ - "trap #" SYSCALL_VECTOR \ + "trap #" SYSCALL_VECTOR "|| nop"\ : "=r" (__res) \ : "r" (__scno), "0" (__res) \ : "memory"); \ @@ -346,7 +346,7 @@ register long __scno __asm__ ("r7") = __ register long __arg2 __asm__ ("r1") = (long)(arg2); \ register long __res __asm__ ("r0") = (long)(arg1); \ __asm__ __volatile__ (\ - "trap #" SYSCALL_VECTOR \ + "trap #" SYSCALL_VECTOR "|| nop"\ : "=r" (__res) \ : "r" (__scno), "0" (__res), "r" (__arg2) \ : "memory"); \ @@ -361,7 +361,7 @@ register long __arg3 __asm__ ("r2") = (l register long __arg2 __asm__ ("r1") = (long)(arg2); \ register long __res __asm__ ("r0") = (long)(arg1); \ __asm__ __volatile__ (\ - "trap #" SYSCALL_VECTOR \ + "trap #" SYSCALL_VECTOR "|| nop"\ : "=r" (__res) \ : "r" (__scno), "0" (__res), "r" (__arg2), \ "r" (__arg3) \ @@ -378,7 +378,7 @@ register long __arg3 __asm__ ("r2") = (l register long __arg2 __asm__ ("r1") = (long)(arg2); \ register long __res __asm__ ("r0") = (long)(arg1); \ __asm__ __volatile__ (\ - "trap #" SYSCALL_VECTOR \ + "trap #" SYSCALL_VECTOR "|| nop"\ : "=r" (__res) \ : "r" (__scno), "0" (__res), "r" (__arg2), \ "r" (__arg3), "r" (__arg4) \ @@ -397,7 +397,7 @@ register long __arg3 __asm__ ("r2") = (l register long __arg2 __asm__ ("r1") = (long)(arg2); \ register long __res __asm__ ("r0") = (long)(arg1); \ __asm__ __volatile__ (\ - "trap #" SYSCALL_VECTOR \ + "trap #" SYSCALL_VECTOR "|| nop"\